/openbmc/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7623.c | 135 FACTOR1(CLK_TOP_UNIVPLL3_D2, CLK_TOP_UNIVPLL_D5, 1, 2), 221 CLK_TOP_UNIVPLL3_D2, 291 CLK_TOP_UNIVPLL3_D2, 363 CLK_TOP_UNIVPLL3_D2,
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H A D | clk-mt7629.c | 125 FACTOR1(CLK_TOP_UNIVPLL3_D2, CLK_TOP_UNIVPLL, 1, 10), 207 CLK_TOP_UNIVPLL3_D2,
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/openbmc/u-boot/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 62 #define CLK_TOP_UNIVPLL3_D2 49 macro
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H A D | mt7623-clk.h | 61 #define CLK_TOP_UNIVPLL3_D2 48 macro
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL3_D2 49 macro
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H A D | mt7622-clk.h | 53 #define CLK_TOP_UNIVPLL3_D2 41 macro
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H A D | mt6797-clk.h | 76 #define CLK_TOP_UNIVPLL3_D2 66 macro
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H A D | mediatek,mt6795-clk.h | 79 #define CLK_TOP_UNIVPLL3_D2 68 macro
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H A D | mt8173-clk.h | 81 #define CLK_TOP_UNIVPLL3_D2 71 macro
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H A D | mt6765-clk.h | 66 #define CLK_TOP_UNIVPLL3_D2 31 macro
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H A D | mediatek,mt8365-clk.h | 41 #define CLK_TOP_UNIVPLL3_D2 31 macro
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H A D | mt2712-clk.h | 65 #define CLK_TOP_UNIVPLL3_D2 34 macro
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H A D | mt2701-clk.h | 44 #define CLK_TOP_UNIVPLL3_D2 34 macro
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt6795-topckgen.c | 435 FACTOR_FLAGS(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univ_249p6m", 1, 2, 0),
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H A D | clk-mt8173-topckgen.c | 514 FACTOR_FLAGS(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univ_249p6m", 1, 2, 0),
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H A D | clk-mt7622.c | 295 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll", 1, 10),
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H A D | clk-mt7629.c | 402 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll", 1, 10),
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H A D | clk-mt6797.c | 56 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll_d5", 1, 2),
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H A D | clk-mt2712.c | 73 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll_d5", 1, 2),
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H A D | clk-mt8365.c | 60 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll", 1, 10),
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H A D | clk-mt6765.c | 116 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll_d5", 1, 2),
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H A D | clk-mt2701.c | 92 FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll_d5", 1, 2),
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