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Searched refs:CLK_TOP_UNIVPLL1_D4 (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h44 #define CLK_TOP_UNIVPLL1_D4 33 macro
H A Dmt7629-clk.h51 #define CLK_TOP_UNIVPLL1_D4 41 macro
H A Dmt7622-clk.h45 #define CLK_TOP_UNIVPLL1_D4 33 macro
H A Dmt6797-clk.h69 #define CLK_TOP_UNIVPLL1_D4 59 macro
H A Dmediatek,mt6795-clk.h72 #define CLK_TOP_UNIVPLL1_D4 61 macro
H A Dmt8173-clk.h74 #define CLK_TOP_UNIVPLL1_D4 64 macro
H A Dmt6765-clk.h59 #define CLK_TOP_UNIVPLL1_D4 24 macro
H A Dmediatek,mt8365-clk.h34 #define CLK_TOP_UNIVPLL1_D4 24 macro
H A Dmt2712-clk.h58 #define CLK_TOP_UNIVPLL1_D4 27 macro
H A Dmt2701-clk.h37 #define CLK_TOP_UNIVPLL1_D4 27 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h54 #define CLK_TOP_UNIVPLL1_D4 41 macro
H A Dmt7623-clk.h54 #define CLK_TOP_UNIVPLL1_D4 41 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c117 FACTOR1(CLK_TOP_UNIVPLL1_D4, CLK_TOP_UNIVPLL, 1, 8),
147 FACTOR1(CLK_TOP_PCIE1_MAC_EN, CLK_TOP_UNIVPLL1_D4, 1, 1),
148 FACTOR1(CLK_TOP_PCIE0_MAC_EN, CLK_TOP_UNIVPLL1_D4, 1, 1),
H A Dclk-mt7623.c128 FACTOR1(CLK_TOP_UNIVPLL1_D4, CLK_TOP_UNIVPLL_D2, 1, 4),
222 CLK_TOP_UNIVPLL1_D4
282 CLK_TOP_UNIVPLL1_D4,
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c428 FACTOR_FLAGS(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univ_624m", 1, 4, 0),
H A Dclk-mt8173-topckgen.c507 FACTOR_FLAGS(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univ_624m", 1, 4, 0),
H A Dclk-mt8135.c64 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_624m", 1, 4),
H A Dclk-mt7622.c287 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll", 1, 8),
H A Dclk-mt7629.c394 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll", 1, 8),
H A Dclk-mt6797.c49 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_d2", 1, 4),
H A Dclk-mt2712.c66 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_d2", 1, 4),
H A Dclk-mt8365.c53 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll", 1, 8),
H A Dclk-mt6765.c109 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_d2", 1, 4),
H A Dclk-mt2701.c84 FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_d2", 1, 4),