| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 103 FACTOR0(CLK_TOP_SYSPLL_D3, CLK_APMIXED_MAINPLL, 1, 3),
110 FACTOR1(CLK_TOP_SYSPLL2_D2, CLK_TOP_SYSPLL_D3, 1, 2),
111 FACTOR1(CLK_TOP_SYSPLL2_D4, CLK_TOP_SYSPLL_D3, 1, 4),
112 FACTOR1(CLK_TOP_SYSPLL2_D8, CLK_TOP_SYSPLL_D3, 1, 8),
243 CLK_TOP_SYSPLL_D3,
408 CLK_TOP_SYSPLL_D3,
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 39 #define CLK_TOP_SYSPLL_D3 28 macro
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| H A D | mt6797-clk.h | 51 #define CLK_TOP_SYSPLL_D3 41 macro
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| H A D | mediatek,mt6795-clk.h | 56 #define CLK_TOP_SYSPLL_D3 45 macro
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| H A D | mt8173-clk.h | 58 #define CLK_TOP_SYSPLL_D3 48 macro
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| H A D | mt6765-clk.h | 41 #define CLK_TOP_SYSPLL_D3 6 macro
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| H A D | mediatek,mt8365-clk.h | 21 #define CLK_TOP_SYSPLL_D3 11 macro
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| H A D | mt2712-clk.h | 41 #define CLK_TOP_SYSPLL_D3 10 macro
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| H A D | mt8183-clk.h | 80 #define CLK_TOP_SYSPLL_D3 44 macro
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| H A D | mt2701-clk.h | 13 #define CLK_TOP_SYSPLL_D3 3 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 30 #define CLK_TOP_SYSPLL_D3 17 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 410 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "main_h364m", 1, 1, 0),
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| H A D | clk-mt8173-topckgen.c | 489 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "main_h364m", 1, 1, 0),
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| H A D | clk-mt8135.c | 56 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll_537p3m", 1, 1),
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| H A D | clk-mt6797.c | 31 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
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| H A D | clk-mt8183.c | 41 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3, 0),
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| H A D | clk-mt2712.c | 49 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "syspll_ck", 1, 3),
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| H A D | clk-mt8365.c | 40 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
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| H A D | clk-mt6765.c | 89 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
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| H A D | clk-mt2701.c | 59 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
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