| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7629.c | 112 FACTOR0(CLK_TOP_SYSPLL4_D2, CLK_APMIXED_MAINPLL, 1, 14),
204 CLK_TOP_SYSPLL4_D2,
233 CLK_TOP_SYSPLL4_D2,
244 CLK_TOP_SYSPLL4_D2,
288 CLK_TOP_SYSPLL4_D2,
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| H A D | clk-mt7623.c | 115 FACTOR1(CLK_TOP_SYSPLL4_D2, CLK_TOP_SYSPLL_D7, 1, 2),
266 CLK_TOP_SYSPLL4_D2,
290 CLK_TOP_SYSPLL4_D2,
299 CLK_TOP_SYSPLL4_D2,
383 CLK_TOP_SYSPLL4_D2,
411 CLK_TOP_SYSPLL4_D2,
|
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt7623-clk.h | 42 #define CLK_TOP_SYSPLL4_D2 29 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 46 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt7622-clk.h | 39 #define CLK_TOP_SYSPLL4_D2 27 macro
|
| H A D | mt6797-clk.h | 60 #define CLK_TOP_SYSPLL4_D2 50 macro
|
| H A D | mediatek,mt6795-clk.h | 63 #define CLK_TOP_SYSPLL4_D2 52 macro
|
| H A D | mt8173-clk.h | 65 #define CLK_TOP_SYSPLL4_D2 55 macro
|
| H A D | mt6765-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 14 macro
|
| H A D | mediatek,mt8365-clk.h | 29 #define CLK_TOP_SYSPLL4_D2 19 macro
|
| H A D | mt2712-clk.h | 48 #define CLK_TOP_SYSPLL4_D2 17 macro
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| H A D | mt2701-clk.h | 25 #define CLK_TOP_SYSPLL4_D2 15 macro
|
| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 417 FACTOR_FLAGS(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "main_h156m", 1, 2, 0),
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| H A D | clk-mt8173-topckgen.c | 496 FACTOR_FLAGS(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "main_h156m", 1, 2, 0),
|
| H A D | clk-mt7622.c | 281 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "mainpll", 1, 14),
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| H A D | clk-mt7629.c | 389 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "mainpll", 1, 14),
|
| H A D | clk-mt6797.c | 40 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "syspll_d7", 1, 2),
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| H A D | clk-mt2712.c | 56 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "syspll_d7", 1, 2),
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| H A D | clk-mt8365.c | 48 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "mainpll", 1, 14),
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| H A D | clk-mt6765.c | 97 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "syspll_d7", 1, 2),
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| H A D | clk-mt2701.c | 71 FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "syspll_d7", 1, 2),
|