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Searched refs:CLK_TOP_SYSPLL2_D8 (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h44 #define CLK_TOP_SYSPLL2_D8 31 macro
H A Dmt7623-clk.h39 #define CLK_TOP_SYSPLL2_D8 26 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h41 #define CLK_TOP_SYSPLL2_D8 31 macro
H A Dmt7622-clk.h35 #define CLK_TOP_SYSPLL2_D8 23 macro
H A Dmt6797-clk.h55 #define CLK_TOP_SYSPLL2_D8 45 macro
H A Dmt6765-clk.h44 #define CLK_TOP_SYSPLL2_D8 9 macro
H A Dmediatek,mt8365-clk.h24 #define CLK_TOP_SYSPLL2_D8 14 macro
H A Dmt2701-clk.h22 #define CLK_TOP_SYSPLL2_D8 12 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c112 FACTOR1(CLK_TOP_SYSPLL2_D8, CLK_TOP_SYSPLL_D3, 1, 8),
301 CLK_TOP_SYSPLL2_D8,
380 CLK_TOP_SYSPLL2_D8,
H A Dclk-mt7629.c107 FACTOR0(CLK_TOP_SYSPLL2_D8, CLK_APMIXED_MAINPLL, 1, 24),
215 CLK_TOP_SYSPLL2_D8,
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c277 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "mainpll", 1, 24),
H A Dclk-mt7629.c384 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "mainpll", 1, 24),
H A Dclk-mt6797.c35 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "syspll_d3", 1, 8),
H A Dclk-mt8365.c43 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "mainpll", 1, 24),
H A Dclk-mt6765.c92 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "syspll_d3", 1, 8),
H A Dclk-mt2701.c68 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "syspll_d3", 1, 8),