/openbmc/u-boot/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 41 #define CLK_TOP_SYSPLL1_D16 28 macro
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H A D | mt7623-clk.h | 36 #define CLK_TOP_SYSPLL1_D16 23 macro
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 38 #define CLK_TOP_SYSPLL1_D16 28 macro
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H A D | mt6797-clk.h | 50 #define CLK_TOP_SYSPLL1_D16 40 macro
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H A D | mediatek,mt6795-clk.h | 55 #define CLK_TOP_SYSPLL1_D16 44 macro
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H A D | mt8173-clk.h | 57 #define CLK_TOP_SYSPLL1_D16 47 macro
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H A D | mt6765-clk.h | 40 #define CLK_TOP_SYSPLL1_D16 5 macro
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H A D | mediatek,mt8365-clk.h | 20 #define CLK_TOP_SYSPLL1_D16 10 macro
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H A D | mt2712-clk.h | 40 #define CLK_TOP_SYSPLL1_D16 9 macro
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H A D | mt2701-clk.h | 19 #define CLK_TOP_SYSPLL1_D16 9 macro
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/openbmc/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7629.c | 104 FACTOR0(CLK_TOP_SYSPLL1_D16, CLK_APMIXED_MAINPLL, 1, 32), 282 CLK_TOP_SYSPLL1_D16 296 CLK_TOP_SYSPLL1_D16,
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H A D | clk-mt7623.c | 109 FACTOR1(CLK_TOP_SYSPLL1_D16, CLK_TOP_SYSPLL_D2, 1, 16), 302 CLK_TOP_SYSPLL1_D16, 410 CLK_TOP_SYSPLL1_D16,
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt6795-topckgen.c | 409 FACTOR_FLAGS(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "main_h546m", 1, 16, 0),
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H A D | clk-mt8173-topckgen.c | 488 FACTOR_FLAGS(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "main_h546m", 1, 16, 0),
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H A D | clk-mt7629.c | 381 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "mainpll", 1, 32),
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H A D | clk-mt6797.c | 30 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
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H A D | clk-mt2712.c | 48 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
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H A D | clk-mt8365.c | 39 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "mainpll", 1, 32),
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H A D | clk-mt6765.c | 88 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
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H A D | clk-mt2701.c | 65 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
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