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Searched refs:CLK_TOP_RTC_SEL (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8173-clk.h130 #define CLK_TOP_RTC_SEL 120 macro
H A Dmt2712-clk.h168 #define CLK_TOP_RTC_SEL 137 macro
H A Dmt2701-clk.h112 #define CLK_TOP_RTC_SEL 101 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h124 #define CLK_TOP_RTC_SEL 110 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-topckgen.c603 MUX_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents, 0x00d0, 24, 2,
H A Dclk-mt2712.c707 MUX_GATE_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents,
H A Dclk-mt2701.c539 MUX_GATE_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c539 MUX_GATE(CLK_TOP_RTC_SEL, rtc_parents, 0xA0, 0, 2, 7),
610 GATE_INFRA(CLK_INFRA_CEC, CLK_TOP_RTC_SEL, 18),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi534 <&topckgen CLK_TOP_RTC_SEL>;