Searched refs:CLK_TOP_HDMI_SEL (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/include/dt-bindings/clock/ |
H A D | mt8173-clk.h | 125 #define CLK_TOP_HDMI_SEL 115 macro
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H A D | mt2701-clk.h | 108 #define CLK_TOP_HDMI_SEL 97 macro
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/openbmc/u-boot/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 122 #define CLK_TOP_HDMI_SEL 108 macro
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt8173-topckgen.c | 594 MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents, 0x00c0, 8, 2, 15),
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H A D | clk-mt2701.c | 534 MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents,
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/openbmc/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7623.c | 536 MUX_GATE(CLK_TOP_HDMI_SEL, hdmi_parents, 0x90, 8, 2, 15),
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8173.dtsi | 1321 assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;
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