Searched refs:CLK_TOP_DPI0_SEL (Results 1 – 10 of 10) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 113 #define CLK_TOP_DPI0_SEL 102 macro
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| H A D | mt8173-clk.h | 116 #define CLK_TOP_DPI0_SEL 106 macro
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| H A D | mediatek,mt8365-clk.h | 103 #define CLK_TOP_DPI0_SEL 93 macro
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| H A D | mt2701-clk.h | 104 #define CLK_TOP_DPI0_SEL 93 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 119 #define CLK_TOP_DPI0_SEL 105 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 490 TOP_MUX_GATE_NOSR(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0xa0, 0, 3, 7, 0),
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| H A D | clk-mt8173-topckgen.c | 577 MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents,
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| H A D | clk-mt8365.c | 501 MUX_GATE_CLR_SET_UPD(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x0c0,
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| H A D | clk-mt2701.c | 527 MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents,
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 532 MUX_GATE(CLK_TOP_DPI0_SEL, dpi0_tve_parents, 0x80, 16, 3, 23),
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