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Searched refs:CLK_TOP_DMPLL_D2 (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c147 FACTOR1(CLK_TOP_DMPLL_D2, CLK_TOP_DMPLL, 1, 2),
194 CLK_TOP_DMPLL_D2
305 CLK_TOP_DMPLL_D2,
312 CLK_TOP_DMPLL_D2,
445 CLK_TOP_DMPLL_D2
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h39 #define CLK_TOP_DMPLL_D2 28 macro
H A Dmt8173-clk.h38 #define CLK_TOP_DMPLL_D2 28 macro
H A Dmt2701-clk.h54 #define CLK_TOP_DMPLL_D2 44 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h70 #define CLK_TOP_DMPLL_D2 57 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c390 FACTOR(CLK_TOP_DMPLL_D2, "dmpll_d2", "clkph_mck_o", 1, 2),
H A Dclk-mt8173-topckgen.c465 FACTOR(CLK_TOP_DMPLL_D2, "dmpll_d2", "clkph_mck_o", 1, 2),
H A Dclk-mt2701.c104 FACTOR(CLK_TOP_DMPLL_D2, "dmpll_d2", "dmpll_ck", 1, 2),