Searched refs:CLK_TOP_CMSYS_SEL (Results 1 – 6 of 6) sorted by relevance
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | mt7623-clk.h | 140 #define CLK_TOP_CMSYS_SEL 126 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt2712-clk.h | 196 #define CLK_TOP_CMSYS_SEL 165 macro
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| H A D | mt2701-clk.h | 125 #define CLK_TOP_CMSYS_SEL 114 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt2712.c | 747 MUX_GATE(CLK_TOP_CMSYS_SEL, "cmsys_sel", cmsys_parents, 0x560, 24, 3, 31),
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| H A D | clk-mt2701.c | 575 MUX_GATE(CLK_TOP_CMSYS_SEL, "cmsys_sel", cmsys_parents,
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 560 MUX_GATE(CLK_TOP_CMSYS_SEL, cmsys_parents, 0xE0, 16, 4, 23),
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