Searched refs:CLK_TOP_AUD_MUX1_SEL (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | mt2701-afe-pcm.txt | 69 <&topckgen CLK_TOP_AUD_MUX1_SEL>, 138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
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/openbmc/u-boot/include/dt-bindings/clock/ |
H A D | mt7623-clk.h | 146 #define CLK_TOP_AUD_MUX1_SEL 132 macro
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | mt2701-clk.h | 131 #define CLK_TOP_AUD_MUX1_SEL 120 macro
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/openbmc/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt7623.c | 503 CLK_TOP_AUD_MUX1_SEL, 569 MUX(CLK_TOP_AUD_MUX1_SEL, aud_mux_parents, 0x12c, 0, 3),
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt2701.dtsi | 435 <&topckgen CLK_TOP_AUD_MUX1_SEL>, 504 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
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H A D | mt7623.dtsi | 636 <&topckgen CLK_TOP_AUD_MUX1_SEL>, 705 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt2701.c | 590 MUX(CLK_TOP_AUD_MUX1_SEL, "aud_mux1_sel", aud_mux_parents,
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