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Searched refs:CLK_TOP_ASM_H_SEL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt7622-clk.h98 #define CLK_TOP_ASM_H_SEL 86 macro
H A Dmt2712-clk.h176 #define CLK_TOP_ASM_H_SEL 145 macro
H A Dmt2701-clk.h123 #define CLK_TOP_ASM_H_SEL 112 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h135 #define CLK_TOP_ASM_H_SEL 121 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c460 MUX_GATE(CLK_TOP_ASM_H_SEL, "asm_h_sel", asm_l_parents,
H A Dclk-mt2712.c719 MUX_GATE(CLK_TOP_ASM_H_SEL, "asm_h_sel", asm_l_parents, 0x510, 24, 2, 31),
H A Dclk-mt2701.c564 MUX_GATE(CLK_TOP_ASM_H_SEL, "asm_h_sel", asm_parents,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c553 MUX_GATE(CLK_TOP_ASM_H_SEL, asm_parents, 0xD0, 0, 2, 7),