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Searched refs:CLK_PERI_I2C0 (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h144 #define CLK_PERI_I2C0 6 macro
H A Dmediatek,mt6795-clk.h198 #define CLK_PERI_I2C0 23 macro
H A Dmt8173-clk.h217 #define CLK_PERI_I2C0 24 macro
H A Dmt2712-clk.h259 #define CLK_PERI_I2C0 20 macro
H A Dmt2701-clk.h246 #define CLK_PERI_I2C0 25 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c74 GATE_PERI0(CLK_PERI_I2C0, "peri_i2c0", "axi_sel", 23),
H A Dclk-mt6795-pericfg.c63 GATE_PERI(CLK_PERI_I2C0, "peri_i2c0", "axi_sel", 23),
H A Dclk-mt8135.c455 GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 26),
H A Dclk-mt2712.c905 GATE_PERI0(CLK_PERI_I2C0, "per_i2c0", "axi_sel", 24),
H A Dclk-mt2701.c831 GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 24),
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h239 #define CLK_PERI_I2C0 24 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c671 GATE_PERI0(CLK_PERI_I2C0, CLK_TOP_AXI_SEL, 24),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi301 clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;
H A Dmt7623.dtsi442 clocks = <&pericfg CLK_PERI_I2C0>,
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi584 clocks = <&pericfg CLK_PERI_I2C0>, <&pericfg CLK_PERI_AP_DMA>;
H A Dmt2712e.dtsi511 clocks = <&pericfg CLK_PERI_I2C0>,
H A Dmt8173.dtsi713 clocks = <&pericfg CLK_PERI_I2C0>,