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Searched refs:B7_4 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/sh4/
H A Dtranslate.c345 #define B7_4 ((ctx->opcode >> 4) & 0xf) macro
496 tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, in _decode_opc()
503 tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 4); in _decode_opc()
558 tcg_gen_mov_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
561 tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_UB); in _decode_opc()
564 tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, in _decode_opc()
568 tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, in _decode_opc()
572 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB); in _decode_opc()
575 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
579 tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, in _decode_opc()
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