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Searched refs:AspeedI2CState (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/include/hw/i2c/
H A Daspeed_i2c.h35 OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C)
240 struct AspeedI2CState;
247 struct AspeedI2CState *controller;
264 struct AspeedI2CState { struct
307 static inline bool aspeed_i2c_is_new_mode(AspeedI2CState *s) in aspeed_i2c_is_new_mode()
397 I2CBus *aspeed_i2c_get_bus(AspeedI2CState *s, int busnr);
/openbmc/qemu/hw/i2c/
H A Daspeed_i2c.c227 AspeedI2CState *s = bus->controller; in aspeed_i2c_dma_read()
301 AspeedI2CState *s = bus->controller; in aspeed_i2c_bus_recv()
409 AspeedI2CState *s = bus->controller; in aspeed_i2c_check_sram()
921 AspeedI2CState *s = opaque; in aspeed_i2c_ctrl_read()
947 AspeedI2CState *s = opaque; in aspeed_i2c_ctrl_write()
984 AspeedI2CState *s = opaque; in aspeed_i2c_share_pool_read()
998 AspeedI2CState *s = opaque; in aspeed_i2c_share_pool_write()
1068 VMSTATE_UINT32(intr_status, AspeedI2CState),
1069 VMSTATE_STRUCT_ARRAY(busses, AspeedI2CState,
1072 VMSTATE_UINT8_ARRAY(share_pool, AspeedI2CState,
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/openbmc/qemu/include/hw/arm/
H A Daspeed_soc.h71 AspeedI2CState i2c;