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Searched refs:ARM_FEATURE_M_SECURITY (Results 1 – 12 of 12) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dm_helper.c560 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in HELPER()
685 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_v7m_load_vector()
860 if (arm_feature(env, ARM_FEATURE_M_SECURITY) && in v7m_exception_taken()
910 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in v7m_exception_taken()
1036 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in v7m_update_fpccr()
1273 if (lspact && arm_feature(env, ARM_FEATURE_M_SECURITY)) { in v7m_push_stack()
1420 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in do_v7m_exception_exit()
1443 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in do_v7m_exception_exit()
1475 return_to_secure = arm_feature(env, ARM_FEATURE_M_SECURITY) && in do_v7m_exception_exit()
1479 if (!arm_feature(env, ARM_FEATURE_M_SECURITY)) { in do_v7m_exception_exit()
[all …]
H A Dcpu-v7m.c171 set_feature(&cpu->env, ARM_FEATURE_M_SECURITY); in cortex_m33_initfn()
206 set_feature(&cpu->env, ARM_FEATURE_M_SECURITY); in cortex_m55_initfn()
H A Dhflags.c123 if (arm_feature(env, ARM_FEATURE_M_SECURITY) && env->v7m.secure) { in rebuild_hflags_m32()
H A Dtranslate.c795 if (arm_dc_feature(s, ARM_FEATURE_M_SECURITY) || in gen_bx_excret()
808 if (arm_dc_feature(s, ARM_FEATURE_M_SECURITY)) { in gen_bx_excret_final_code()
/openbmc/qemu/hw/intc/
H A Darmv7m_nvic.c108 bool check_sec = arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY); in nvic_rettobase()
174 if (!arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY)) { in exc_targets_secure()
304 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY)) { in nvic_recompute_state()
635 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY) && in do_armv7m_nvic_set_pending()
730 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY) && in armv7m_nvic_set_pending_lazyfp()
2515 return arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY); in nvic_security_needed()
2609 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY)) { in armv7m_nvic_reset()
2634 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY)) { in armv7m_nvic_reset()
/openbmc/qemu/target/arm/
H A Dcpu.c411 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_reset_hold()
515 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_reset_hold()
548 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_reset_hold()
1415 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_dump_state()
1841 if (arm_feature(&cpu->env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_post_init()
2487 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_realizefn()
2512 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_realizefn()
2545 bool has_secure = cpu->has_el3 || arm_feature(env, ARM_FEATURE_M_SECURITY); in arm_cpu_realizefn()
H A Dmachine.c692 return arm_feature(env, ARM_FEATURE_M_SECURITY); in m_security_needed()
760 assert(!arm_feature(env, ARM_FEATURE_M_SECURITY)); in get_cpsr()
H A Dgdbstub.c589 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in arm_cpu_register_gdb_regs_for_features()
H A Dcpu.h2431 ARM_FEATURE_M_SECURITY, /* M profile Security Extension */ enumerator
H A Dptw.c2925 if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { in get_phys_addr_pmsav8()
H A Dhelper.c12466 if (arm_feature(env, ARM_FEATURE_M_SECURITY) && !env->v7m.secure) { in fp_exception_el()
12691 if (arm_feature(env, ARM_FEATURE_M_SECURITY) && in cpu_get_tb_cpu_state()
/openbmc/qemu/hw/arm/
H A Darmv7m.c343 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY) && in armv7m_realize()
469 if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY)) { in armv7m_realize()