Searched hist:f3d47d580402d11b73108de807031124c135e370 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/include/hw/riscv/ |
| H A D | sifive_u.h | diff f3d47d580402d11b73108de807031124c135e370 Fri Sep 06 11:20:05 CDT 2019 Bin Meng <bmeng.cn@gmail.com> riscv: sifive_u: Set the minimum number of cpus to 2
It is not useful if we only have one management CPU.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
[Palmer: Set default CPUs to 2]
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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| /openbmc/qemu/hw/riscv/ |
| H A D | sifive_u.c | diff f3d47d580402d11b73108de807031124c135e370 Fri Sep 06 11:20:05 CDT 2019 Bin Meng <bmeng.cn@gmail.com> riscv: sifive_u: Set the minimum number of cpus to 2
It is not useful if we only have one management CPU.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
[Palmer: Set default CPUs to 2]
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
|