Home
last modified time | relevance | path

Searched hist:e35b135055e24d705736fd98c975afc46a793a09 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/usb/dwc2/
H A Dhw.hdiff e35b135055e24d705736fd98c975afc46a793a09 Tue Jan 31 19:25:43 CST 2017 Bruno Herrera <bruherrera@gmail.com> usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
to enable the transceiver.
Also add the dwc2_set_params function for stm32f4 otg fs.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
H A Dparams.cdiff e35b135055e24d705736fd98c975afc46a793a09 Tue Jan 31 19:25:43 CST 2017 Bruno Herrera <bruherrera@gmail.com> usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
to enable the transceiver.
Also add the dwc2_set_params function for stm32f4 otg fs.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
H A Dcore.hdiff e35b135055e24d705736fd98c975afc46a793a09 Tue Jan 31 19:25:43 CST 2017 Bruno Herrera <bruherrera@gmail.com> usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
to enable the transceiver.
Also add the dwc2_set_params function for stm32f4 otg fs.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
H A Dhcd.cdiff e35b135055e24d705736fd98c975afc46a793a09 Tue Jan 31 19:25:43 CST 2017 Bruno Herrera <bruherrera@gmail.com> usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

This patch introduces a new parameter to activate USB OTG HS/FS core
embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
to enable the transceiver.
Also add the dwc2_set_params function for stm32f4 otg fs.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>