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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-corediv-clock.txtdiff e120c17a70e5bad1ed601502844f708837b132a8 Thu Jan 26 21:25:42 CST 2017 Chris Packham <chris.packham@alliedtelesis.co.nz> clk: mvebu: support for 98DX3236 SoC

The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from
the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz.

The clock gating options are a subset of those on the Armada XP.

The core clock divider is different to the Armada XP also.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dmvebu-cpu-clock.txtdiff e120c17a70e5bad1ed601502844f708837b132a8 Thu Jan 26 21:25:42 CST 2017 Chris Packham <chris.packham@alliedtelesis.co.nz> clk: mvebu: support for 98DX3236 SoC

The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from
the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz.

The clock gating options are a subset of those on the Armada XP.

The core clock divider is different to the Armada XP also.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
/openbmc/linux/drivers/clk/mvebu/
H A Dclk-corediv.cdiff e120c17a70e5bad1ed601502844f708837b132a8 Thu Jan 26 21:25:42 CST 2017 Chris Packham <chris.packham@alliedtelesis.co.nz> clk: mvebu: support for 98DX3236 SoC

The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from
the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz.

The clock gating options are a subset of those on the Armada XP.

The core clock divider is different to the Armada XP also.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Darmada-xp.cdiff e120c17a70e5bad1ed601502844f708837b132a8 Thu Jan 26 21:25:42 CST 2017 Chris Packham <chris.packham@alliedtelesis.co.nz> clk: mvebu: support for 98DX3236 SoC

The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from
the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz.

The clock gating options are a subset of those on the Armada XP.

The core clock divider is different to the Armada XP also.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-cpu.cdiff e120c17a70e5bad1ed601502844f708837b132a8 Thu Jan 26 21:25:42 CST 2017 Chris Packham <chris.packham@alliedtelesis.co.nz> clk: mvebu: support for 98DX3236 SoC

The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from
the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz.

The clock gating options are a subset of those on the Armada XP.

The core clock divider is different to the Armada XP also.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>