Searched hist:cc6ea0dd28d450925dd43135647fcb73f171c748 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/powerpc/sysdev/ |
| H A D | fsl_pci.h | diff cc6ea0dd28d450925dd43135647fcb73f171c748 Thu Sep 20 23:12:52 CDT 2012 Roy ZANG <tie-fei.zang@freescale.com> powerpc/85xx: Add support for FSL PCIe controller v3.0
The T4240 utilizes a new PCIe controller block that has some minor
programming model differences from previous versions.
The major one that impacts initialization is how we determine the link
state. On the 3.x controllers we have a memory mapped SoC register
instead of a PCI config register that reports the link state.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| H A D | fsl_pci.c | diff cc6ea0dd28d450925dd43135647fcb73f171c748 Thu Sep 20 23:12:52 CDT 2012 Roy ZANG <tie-fei.zang@freescale.com> powerpc/85xx: Add support for FSL PCIe controller v3.0
The T4240 utilizes a new PCIe controller block that has some minor
programming model differences from previous versions.
The major one that impacts initialization is how we determine the link
state. On the 3.x controllers we have a memory mapped SoC register
instead of a PCI config register that reports the link state.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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