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/openbmc/linux/arch/arm/mm/
H A Dproc-arm940.Sdiff b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e Sat May 10 15:05:31 CDT 2008 Lennert Buytenhek <buytenh@wantstofly.org> [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode

The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
H A Dproc-arm946.Sdiff b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e Sat May 10 15:05:31 CDT 2008 Lennert Buytenhek <buytenh@wantstofly.org> [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode

The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
H A Dproc-arm925.Sdiff b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e Sat May 10 15:05:31 CDT 2008 Lennert Buytenhek <buytenh@wantstofly.org> [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode

The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
H A Dproc-arm926.Sdiff b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e Sat May 10 15:05:31 CDT 2008 Lennert Buytenhek <buytenh@wantstofly.org> [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode

The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>