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| /openbmc/u-boot/include/ |
| H A D | mpc85xx.h | diff 96d2bb952bbf2e5a14f6ad668312cbce3cc4485a Tue Apr 07 20:20:00 CDT 2015 Scott Wood <scottwood@freescale.com> powerpc/mpc85xx: Don't relocate exception vectors
Booke does not require exception vectors to be located at address zero.
U-Boot was doing so anyway, simply because that's how it had been done
on other PPC. The downside of this is that once the OS is loaded to
address zero, the exception vectors have been overwritten -- which
makes it difficult to diagnose a crash that happens after that point.
The IVOR setup and trap entry code is simplified somewhat as a result.
Also, there is no longer a need to align individual exceptions on 0x100
byte boundaries.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| H A D | ppc_asm.tmpl | diff 96d2bb952bbf2e5a14f6ad668312cbce3cc4485a Tue Apr 07 20:20:00 CDT 2015 Scott Wood <scottwood@freescale.com> powerpc/mpc85xx: Don't relocate exception vectors
Booke does not require exception vectors to be located at address zero.
U-Boot was doing so anyway, simply because that's how it had been done
on other PPC. The downside of this is that once the OS is loaded to
address zero, the exception vectors have been overwritten -- which
makes it difficult to diagnose a crash that happens after that point.
The IVOR setup and trap entry code is simplified somewhat as a result.
Also, there is no longer a need to align individual exceptions on 0x100
byte boundaries.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | start.S | diff 96d2bb952bbf2e5a14f6ad668312cbce3cc4485a Tue Apr 07 20:20:00 CDT 2015 Scott Wood <scottwood@freescale.com> powerpc/mpc85xx: Don't relocate exception vectors
Booke does not require exception vectors to be located at address zero.
U-Boot was doing so anyway, simply because that's how it had been done
on other PPC. The downside of this is that once the OS is loaded to
address zero, the exception vectors have been overwritten -- which
makes it difficult to diagnose a crash that happens after that point.
The IVOR setup and trap entry code is simplified somewhat as a result.
Also, there is no longer a need to align individual exceptions on 0x100
byte boundaries.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|