Searched hist:"7 b9225237049181524be5a8801dde6a6716e1357" (Results 1 – 3 of 3) sorted by relevance
/openbmc/u-boot/board/ti/dra7xx/ |
H A D | mux_data.h | diff 7b9225237049181524be5a8801dde6a6716e1357 Mon Aug 04 09:12:24 CDT 2014 Lokesh Vutla <lokeshvutla@ti.com> ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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H A D | evm.c | diff 7b9225237049181524be5a8801dde6a6716e1357 Mon Aug 04 09:12:24 CDT 2014 Lokesh Vutla <lokeshvutla@ti.com> ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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/openbmc/u-boot/include/configs/ |
H A D | dra7xx_evm.h | diff 7b9225237049181524be5a8801dde6a6716e1357 Mon Aug 04 09:12:24 CDT 2014 Lokesh Vutla <lokeshvutla@ti.com> ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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