Searched hist:"72 dec1666fe92b5a5932d7f5c26bdfc72e238bcb" (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/target/riscv/ |
| H A D | debug.c | diff 72dec1666fe92b5a5932d7f5c26bdfc72e238bcb Wed Jun 26 08:22:46 CDT 2024 Alvin Chang <alvinga@andestech.com> target/riscv: Apply modularized matching conditions for watchpoint
We have implemented trigger_common_match(), which checks if the enabled
privilege levels of the trigger match CPU's current privilege level.
Remove the related code in riscv_cpu_debug_check_watchpoint() and invoke
trigger_common_match() to check the privilege levels of the type 2 and
type 6 triggers for the watchpoints.
This commit also changes the behavior of looping the triggers. In
previous implementation, if we have a type 2 trigger and
env->virt_enabled is true, we directly return false to stop the loop.
Now we keep looping all the triggers until we find a matched trigger.
Only load/store bits and loaded/stored address should be further checked
in riscv_cpu_debug_check_watchpoint().
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240626132247.2761286-3-alvinga@andestech.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|