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/openbmc/linux/drivers/gpu/drm/radeon/
H A Dbtc_dpm.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dr520.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dni_dpm.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dr420.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Drs400.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Drs690.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dci_dpm.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Drv515.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Drs600.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dr300.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsi_dpm.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Drv770.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dcik.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dni.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dradeon_pm.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dr100.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsi.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Devergreen.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dr600.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dradeon_display.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dradeon_device.cdiff 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 Wed Dec 18 13:07:14 CST 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon/pm: move pm handling into the asic specific code

We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>