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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Ddenali.hdiff 8ccfbfb3e1c54caf67def3626ca046fafaa5092d Wed Dec 19 05:03:18 CST 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
H A Ddenali.cdiff 8ccfbfb3e1c54caf67def3626ca046fafaa5092d Wed Dec 19 05:03:18 CST 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
H A Ddenali_dt.cdiff 8ccfbfb3e1c54caf67def3626ca046fafaa5092d Wed Dec 19 05:03:18 CST 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
/openbmc/linux/drivers/mtd/nand/raw/
H A Ddenali_pci.cdiff 1dfac31a5a63ac04a9b5fbc3f5105a586560f191 Fri Jun 22 11:06:38 CDT 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
H A Ddenali.hdiff 1dfac31a5a63ac04a9b5fbc3f5105a586560f191 Fri Jun 22 11:06:38 CDT 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
H A Ddenali_dt.cdiff 1dfac31a5a63ac04a9b5fbc3f5105a586560f191 Fri Jun 22 11:06:38 CDT 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
H A Ddenali.cdiff 1dfac31a5a63ac04a9b5fbc3f5105a586560f191 Fri Jun 22 11:06:38 CDT 2018 Masahiro Yamada <yamada.masahiro@socionext.com> mtd: rawnand: denali: optimize timing parameters for data interface

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Tested-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>