/openbmc/u-boot/board/phytec/pcl063/ |
H A D | MAINTAINERS | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | README | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | Kconfig | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | spl.c | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | Makefile | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | pcl063.c | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6ul-pcl063.dtsi | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | imx6ul-phycore-segin.dts | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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H A D | Makefile | diff 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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/openbmc/u-boot/include/configs/ |
H A D | pcl063.h | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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/openbmc/u-boot/configs/ |
H A D | phycore_pcl063_defconfig | 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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/openbmc/u-boot/arch/arm/mach-imx/mx6/ |
H A D | Kconfig | diff 0963060c9912c404280e5540018d02777b3400af Tue Dec 11 05:34:46 CST 2018 Martyn Welch <martyn@welchs.me.uk> imx: Add PHYTEC phyBOARD-i.MX6UL-Segin
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0
Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg)
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
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