| /openbmc/linux/drivers/gpu/drm/i915/gvt/ |
| H A D | edid.h | 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | debug.h | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | interrupt.h | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | display.h | 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | Makefile | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | edid.c | 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | interrupt.c | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | display.c | 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | vgpu.c | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | gvt.h | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | handlers.c | diff 04d348ae3f0aea6523bc3b0688b5fc90c1c60d0e Mon Apr 25 17:28:56 CDT 2016 Zhi Wang <zhi.a.wang@intel.com> drm/i915/gvt: vGPU display virtualization
This patch introduces the GVT-g display virtualization.
It consists a collection of display MMIO handlers, like power well register
handler, pipe register handler, plane register handler, which will emulate
all display MMIOs behavior to support virtual mode setting sequence for
guest.
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|