| /openbmc/u-boot/drivers/watchdog/ |
| H A D | Kconfig | 1 menu "Watchdog Timer Support"
3 config WATCHDOG config
4 bool "Enable U-Boot watchdog reset"
6 This option enables U-Boot watchdog support where U-Boot is using
7 watchdog_reset function to service watchdog device in U-Boot. Enable
8 this option if you want to service enabled watchdog by U-Boot. Disable
9 this option if you want U-Boot to start watchdog but never service it.
15 bool "Disable reset watchdog"
17 Disable reset watchdog, which can let WATCHDOG_RESET invalid, so
18 that the watchdog will not be fed in u-boot.
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| /openbmc/linux/drivers/watchdog/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # Watchdog device configuration
7 menuconfig WATCHDOG config
8 bool "Watchdog Timer Support"
11 character special file /dev/watchdog with major number 10 and minor
12 number 130 using mknod ("man mknod"), you will get a watchdog, i.e.:
16 on-line as fast as possible after a lock-up. There's both a watchdog
18 reboot the machine) and a driver for hardware watchdog boards, which
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
23 The watchdog is usually used together with the watchdog daemon
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| H A D | via_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * VIA Chipset Watchdog Driver
8 * Timer code by Wim Van Sebroeck <wim@iguana.be>
10 * Caveat: PnP must be enabled in BIOS to allow full access to watchdog
11 * control registers. If not, the watchdog must be configured in BIOS manually.
21 #include <linux/timer.h>
22 #include <linux/watchdog.h>
26 #define VIA_WDT_CONF 0xec /* watchdog enable state */
29 #define VIA_WDT_CONF_ENABLE 0x01 /* 1: enable watchdog */
30 #define VIA_WDT_CONF_MMIO 0x02 /* 1: enable watchdog MMIO */
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| H A D | smsc37b787_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SMsC 37B787 Watchdog Timer driver for Linux 2.6.x.x
9 * any of this software. This material is provided "AS-IS" in
12 * (C) Copyright 2003-2006 Sven Anders <anders@anduras.de>
15 * 2003 - Created version 1.0 for Linux 2.4.x.
16 * 2006 - Ported to Linux 2.6, added nowayout and MAGICCLOSE
21 * A Watchdog Timer (WDT) is a hardware circuit that can
26 * via the /dev/watchdog special device file that userspace is
28 * occurs, the driver will usually tell the hardware watchdog
29 * that everything is in order, and that the watchdog should wait
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| H A D | pika_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * PIKA FPGA based Watchdog Timer
19 #include <linux/watchdog.h>
22 #include <linux/timer.h>
29 #define DRV_NAME "PIKA-WDT"
34 /* Timer heartbeat (500ms) */
41 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
46 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
51 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
55 struct timer_list timer; /* The timer that pings the watchdog */ member
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| H A D | alim1535_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Watchdog for the 7101 PMU version found in the ALi M1535 chipsets
12 #include <linux/watchdog.h>
36 "Watchdog timeout in seconds. (0 < timeout < 18000, default="
42 "Watchdog cannot be stopped once started (default="
46 * ali_start - start watchdog countdown
48 * Starts the timer running providing the timer has a counter
67 * ali_stop - stop the timer countdown
69 * Stop the ALi watchdog countdown
87 * ali_keepalive - send a keepalive to the watchdog
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| H A D | sc520_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AMD Elan SC520 processor Watchdog Timer driver
9 * any of this software. This material is provided "AS-IS" in
13 * 9/27 - 2001 [Initial release]
16 * - Fixed formatting
17 * - Removed debug printks
18 * - Fixed SMP built kernel deadlock
19 * - Switched to private locks not lock_kernel
20 * - Used ioremap/writew/readw
21 * - Added NOWAYOUT support
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| H A D | sa1100_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Watchdog driver for the SA11x0/PXA2xx
10 * "AS-IS" and at no charge.
27 #include <linux/watchdog.h>
34 #define REG_OSMR0 0x0000 /* OS timer Match Reg. 0 */
35 #define REG_OSMR1 0x0004 /* OS timer Match Reg. 1 */
36 #define REG_OSMR2 0x0008 /* OS timer Match Reg. 2 */
37 #define REG_OSMR3 0x000c /* OS timer Match Reg. 3 */
38 #define REG_OSCR 0x0010 /* OS timer Counter Reg. */
39 #define REG_OSSR 0x0014 /* OS timer Status Reg. */
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| H A D | at91sam9_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Watchdog driver for Atmel AT91SAM9x processors.
5 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
10 * The Watchdog Timer Mode Register can be only written to once. If the
28 #include <linux/watchdog.h>
30 #include <linux/timer.h>
38 #define DRV_NAME "AT91SAM9 Watchdog"
41 readl_relaxed((wdt)->base + (field))
43 writel_relaxed((val), (wdt)->base + (field))
45 /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
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| H A D | alim7101_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ALi M7101 PMU Computer Watchdog Timer driver
6 * and the Cobalt kernel WDT timer driver by Tim Hockin
12 * drivers in that the driver will ping the watchdog by itself,
18 * Aug 23, 2004 - Added use_gpio module parameter for use on revision a1d PMUs
20 * -- Mike Waychison <michael.waychison@sun.com>
28 #include <linux/timer.h>
30 #include <linux/watchdog.h>
51 * If we reset the watchdog every ~250ms we should be safe. */
58 * char to /dev/watchdog every 30 seconds.
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| /openbmc/openbmc-test-automation/ipmi/ |
| H A D | test_ipmi_watchdog.robot | 3 Documentation Module to test out of band IPMI watchdog functionality.
21 Test IPMI Watchdog Timer Does Not Log Bit
22 [Documentation] Execute out of band set/get do not log bit for watchdog timer.
27 ${IPMI_RAW_CMD['Watchdog']['Set'][0]} ${IPMI_RAW_CMD['Watchdog']['Get'][0]}
28 ... ${IPMI_RAW_CMD['Watchdog']['Get'][1]}
29 ${IPMI_RAW_CMD['Watchdog']['Set'][3]} ${IPMI_RAW_CMD['Watchdog']['Get'][0]}
30 ... ${IPMI_RAW_CMD['Watchdog']['Get'][3]}
32 Test IPMI Watchdog Timer Stop Bit
33 [Documentation] Execute out of band set/get stop/resume timer stop bit for watchdog timer.
35 [Template] Execute IPMI Raw Command And Verify Response Data After Watchdog Expires
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| /openbmc/linux/Documentation/watchdog/ |
| H A D | watchdog-kernel-api.rst | 2 The Linux WatchDog Timer Driver Core kernel API
5 Last reviewed: 12-Feb-2013
10 ------------
11 This document does not describe what a WatchDog Timer (WDT) Driver or Device is.
13 with a WatchDog Timer. If you want to know this then please read the following
14 file: Documentation/watchdog/watchdog-api.rst .
17 WatchDog Timer Drivers that want to use the WatchDog Timer Driver Core
20 a watchdog timer driver then only needs to provide the different routines
21 (operations) that control the watchdog timer (WDT).
24 -------
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| H A D | hpwdt.rst | 2 HPE iLO NMI Watchdog Driver
11 The HPE iLO NMI Watchdog driver is a kernel module that provides basic
12 watchdog functionality and handler for the iLO "Generate NMI to System"
18 Watchdog functionality is enabled like any other common watchdog driver. That
19 is, an application needs to be started that kicks off the watchdog timer. A
20 basic application exists in tools/testing/selftests/watchdog/ named
21 watchdog-test.c. Simply compile the C file and kick it off. If the system
22 gets into a bad state and hangs, the HPE ProLiant iLO timer register will
29 soft_margin allows the user to set the watchdog timer value.
32 pretimeout allows the user to set the watchdog pretimeout value.
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| /openbmc/phosphor-watchdog/src/ |
| H A D | watchdog.hpp | 6 #include <sdeventplus/utility/timer.hpp>
7 #include <xyz/openbmc_project/State/Watchdog/server.hpp>
17 namespace watchdog namespace
22 using WatchdogInherits = sdbusplus::server::object_t<Base::Watchdog>;
24 /** @class Watchdog
25 * @brief OpenBMC watchdog implementation.
27 * xyz.openbmc_project.State.Watchdog DBus API.
29 class Watchdog : public WatchdogInherits class
32 Watchdog() = delete;
33 ~Watchdog() = default;
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| H A D | watchdog.cpp | 1 #include "watchdog.hpp"
3 #include <phosphor-logging/elog.hpp>
4 #include <phosphor-logging/log.hpp>
14 namespace watchdog namespace
27 void Watchdog::resetTimeRemaining(bool enableWatchdog) in resetTimeRemaining()
36 // Enable or disable watchdog
37 bool Watchdog::enabled(bool value) in enabled()
45 // Attempt to fallback or disable our timer if needed in enabled()
50 else if (!this->enabled()) in enabled()
52 auto interval_ms = this->interval(); in enabled()
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| /openbmc/u-boot/lib/efi_selftest/ |
| H A D | efi_selftest_watchdog.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * The 'watchdog timer' unit test checks that the watchdog timer
9 * a timer reset.
11 * The 'watchdog reboot' unit test checks that the watchdog timer
15 * setenv efi_selftest watchdog reboot
25 /* Status code returned when resetting watchdog */
52 /* Reset watchdog timer to one second */ in notify()
53 ret = boottime->set_watchdog_timer(1, 0, 0, NULL); in notify()
55 notify_context->status = ret; in notify()
57 notify_context->timer_ticks++; in notify()
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| /openbmc/qemu/include/hw/timer/ |
| H A D | npcm7xx_timer.h | 2 * Nuvoton NPCM7xx Timer Controller
21 #include "qemu/timer.h"
23 /* Each Timer Module (TIM) instance holds five 25 MHz timers. */
32 /* The basic watchdog timer period is 2^14 clock cycles. */
35 #define NPCM7XX_WATCHDOG_RESET_GPIO_OUT "npcm7xx-clk-watchdog-reset-gpio-out"
40 * struct NPCM7xxBaseTimer - Basic functionality that both regular timer and
41 * watchdog timer use.
42 * @qtimer: QEMU timer that notifies us on expiration.
44 * @remaining_ns: Remaining time until expiration if timer is paused.
53 * struct NPCM7xxTimer - Individual timer state.
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| /openbmc/qemu/hw/watchdog/ |
| H A D | cmsdk-apb-watchdog.c | 2 * ARM CMSDK APB watchdog emulation
13 * This is a model of the "APB watchdog" which is part of the Cortex-M
14 * System Design Kit (CMSDK) and documented in the Cortex-M System
28 #include "sysemu/watchdog.h"
31 #include "hw/qdev-properties.h"
33 #include "hw/qdev-clock.h"
34 #include "hw/watchdog/cmsdk-apb-watchdog.h"
88 return s->intstatus && (s->control & R_WDOGCONTROL_INTEN_MASK); in cmsdk_apb_watchdog_intstatus()
94 return s->resetstatus && (s->control & R_WDOGCONTROL_RESEN_MASK); in cmsdk_apb_watchdog_resetstatus()
102 if (s->itcr) { in cmsdk_apb_watchdog_update()
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| H A D | wdt_ib700.c | 2 * Virtual hardware watchdog.
24 #include "qemu/timer.h"
25 #include "sysemu/watchdog.h"
47 QEMUTimer *timer; member
52 /* This is the timer. We use a global here because the watchdog
53 * code ensures there is only one watchdog (it is located at a fixed,
57 /* A write to this register enables the timer. */
70 timer_mod(s->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout); in ib700_write_enable_reg()
73 /* A write (of any value) to this register disables the timer. */
80 timer_del(s->timer); in ib700_write_disable_reg()
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| /openbmc/qemu/hw/ppc/ |
| H A D | ppc_booke.c | 28 #include "qemu/timer.h"
37 tlb->attr = 0; in booke_set_tlb()
38 tlb->prot = PAGE_RWX << 4 | PAGE_VALID; in booke_set_tlb()
39 tlb->size = size; in booke_set_tlb()
40 tlb->EPN = va & TARGET_PAGE_MASK; in booke_set_tlb()
41 tlb->RPN = pa & TARGET_PAGE_MASK; in booke_set_tlb()
42 tlb->PID = 0; in booke_set_tlb()
45 /* Timer Control Register */
47 #define TCR_WP_SHIFT 30 /* Watchdog Timer Period */
49 #define TCR_WRC_SHIFT 28 /* Watchdog Timer Reset Control */
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| /openbmc/linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | snps,dw-wdt.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys Designware Watchdog Timer
10 - $ref: watchdog.yaml#
13 - Jamie Iles <jamie@jamieiles.com>
18 - const: snps,dw-wdt
19 - items:
20 - enum:
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| H A D | qcom-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer
10 - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
14 pattern: "^(watchdog|timer)@[0-9a-f]+$"
18 - items:
19 - enum:
20 - qcom,kpss-wdt-ipq4019
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| H A D | marvell,cn10624-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/marvell,cn10624-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell Global Timer (GTI) system watchdog
10 - Bharat Bhushan <bbhushan2@marvell.com>
13 - $ref: watchdog.yaml#
18 - enum:
19 - marvell,cn9670-wdt
20 - marvell,cn10624-wdt
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| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | brcm,twd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom's Timer-Watchdog (aka TWD)
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
15 registers layout). This block consists of: timers, watchdog and optionally a
21 - enum:
22 - brcm,bcm4908-twd
23 - brcm,bcm7038-twd
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| /openbmc/linux/arch/sparc/include/uapi/asm/ |
| H A D | watchdog.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * watchdog - Driver interface for the hardware watchdog timers
14 #include <linux/watchdog.h>
16 /* Solaris compatibility ioctls--
17 * Ref. <linux/watchdog.h> for standard linux watchdog ioctls
19 #define WIOCSTART _IO (WATCHDOG_IOCTL_BASE, 10) /* Start Timer */
20 #define WIOCSTOP _IO (WATCHDOG_IOCTL_BASE, 11) /* Stop Timer */
21 #define WIOCGSTAT _IOR(WATCHDOG_IOCTL_BASE, 12, int)/* Get Timer Status */
25 #define WD_FREERUN 0x01 /* timer is running, interrupts disabled */
26 #define WD_EXPIRED 0x02 /* timer has expired */
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