xref: /openbmc/linux/drivers/watchdog/sa1100_wdt.c (revision b181f7029bd71238ac2754ce7052dffd69432085)
1d0173278SGuenter Roeck // SPDX-License-Identifier: GPL-2.0+
2b7e04f8cSWim Van Sebroeck /*
3b7e04f8cSWim Van Sebroeck  *	Watchdog driver for the SA11x0/PXA2xx
4b7e04f8cSWim Van Sebroeck  *
5b7e04f8cSWim Van Sebroeck  *	(c) Copyright 2000 Oleg Drokin <green@crimea.edu>
629fa0586SAlan Cox  *	    Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
7b7e04f8cSWim Van Sebroeck  *
8b7e04f8cSWim Van Sebroeck  *	Neither Oleg Drokin nor iXcelerator.com admit liability nor provide
9b7e04f8cSWim Van Sebroeck  *	warranty for any of this software. This material is provided
10b7e04f8cSWim Van Sebroeck  *	"AS-IS" and at no charge.
11b7e04f8cSWim Van Sebroeck  *
12b7e04f8cSWim Van Sebroeck  *	(c) Copyright 2000           Oleg Drokin <green@crimea.edu>
13b7e04f8cSWim Van Sebroeck  *
14b7e04f8cSWim Van Sebroeck  *	27/11/2000 Initial release
15b7e04f8cSWim Van Sebroeck  */
1627c766aaSJoe Perches 
1727c766aaSJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1827c766aaSJoe Perches 
19b7e04f8cSWim Van Sebroeck #include <linux/module.h>
20b7e04f8cSWim Van Sebroeck #include <linux/moduleparam.h>
216924089cSRobert Jarzmik #include <linux/clk.h>
22b7e04f8cSWim Van Sebroeck #include <linux/types.h>
23b7e04f8cSWim Van Sebroeck #include <linux/kernel.h>
24b7e04f8cSWim Van Sebroeck #include <linux/fs.h>
25e86bd43bSArnd Bergmann #include <linux/platform_device.h>
26b7e04f8cSWim Van Sebroeck #include <linux/miscdevice.h>
27b7e04f8cSWim Van Sebroeck #include <linux/watchdog.h>
28b7e04f8cSWim Van Sebroeck #include <linux/init.h>
2923019a73SRob Herring #include <linux/io.h>
301977f032SJiri Slaby #include <linux/bitops.h>
31f19e0312SAlan Cox #include <linux/uaccess.h>
3287c52578SRussell King #include <linux/timex.h>
33b7e04f8cSWim Van Sebroeck 
34e86bd43bSArnd Bergmann #define REG_OSMR0  	0x0000  /* OS timer Match Reg. 0 */
35e86bd43bSArnd Bergmann #define REG_OSMR1  	0x0004  /* OS timer Match Reg. 1 */
36e86bd43bSArnd Bergmann #define REG_OSMR2  	0x0008  /* OS timer Match Reg. 2 */
37e86bd43bSArnd Bergmann #define REG_OSMR3  	0x000c  /* OS timer Match Reg. 3 */
38e86bd43bSArnd Bergmann #define REG_OSCR   	0x0010  /* OS timer Counter Reg. */
39e86bd43bSArnd Bergmann #define REG_OSSR   	0x0014  /* OS timer Status Reg. */
40e86bd43bSArnd Bergmann #define REG_OWER   	0x0018  /* OS timer Watch-dog Enable Reg. */
41e86bd43bSArnd Bergmann #define REG_OIER  	0x001C  /* OS timer Interrupt Enable Reg. */
42b7e04f8cSWim Van Sebroeck 
43e86bd43bSArnd Bergmann #define OSSR_M3		(1 << 3)	/* Match status channel 3 */
44e86bd43bSArnd Bergmann #define OSSR_M2		(1 << 2)	/* Match status channel 2 */
45e86bd43bSArnd Bergmann #define OSSR_M1		(1 << 1)	/* Match status channel 1 */
46e86bd43bSArnd Bergmann #define OSSR_M0		(1 << 0)	/* Match status channel 0 */
47e86bd43bSArnd Bergmann 
48e86bd43bSArnd Bergmann #define OWER_WME	(1 << 0)	/* Watchdog Match Enable */
49e86bd43bSArnd Bergmann 
50e86bd43bSArnd Bergmann #define OIER_E3		(1 << 3)	/* Interrupt enable channel 3 */
51e86bd43bSArnd Bergmann #define OIER_E2		(1 << 2)	/* Interrupt enable channel 2 */
52e86bd43bSArnd Bergmann #define OIER_E1		(1 << 1)	/* Interrupt enable channel 1 */
53e86bd43bSArnd Bergmann #define OIER_E0		(1 << 0)	/* Interrupt enable channel 0 */
54b7e04f8cSWim Van Sebroeck 
5528a62385SEric Miao static unsigned long oscr_freq;
56b7e04f8cSWim Van Sebroeck static unsigned long sa1100wdt_users;
57a6f052e3SRaphael Assenat static unsigned int pre_margin;
58b7e04f8cSWim Van Sebroeck static int boot_status;
59e86bd43bSArnd Bergmann static void __iomem *reg_base;
60e86bd43bSArnd Bergmann 
sa1100_wr(u32 val,u32 offset)61e86bd43bSArnd Bergmann static inline void sa1100_wr(u32 val, u32 offset)
62e86bd43bSArnd Bergmann {
63e86bd43bSArnd Bergmann 	writel_relaxed(val, reg_base + offset);
64e86bd43bSArnd Bergmann }
65e86bd43bSArnd Bergmann 
sa1100_rd(u32 offset)66e86bd43bSArnd Bergmann static inline u32 sa1100_rd(u32 offset)
67e86bd43bSArnd Bergmann {
68e86bd43bSArnd Bergmann 	return readl_relaxed(reg_base + offset);
69e86bd43bSArnd Bergmann }
70b7e04f8cSWim Van Sebroeck 
71b7e04f8cSWim Van Sebroeck /*
72b7e04f8cSWim Van Sebroeck  *	Allow only one person to hold it open
73b7e04f8cSWim Van Sebroeck  */
sa1100dog_open(struct inode * inode,struct file * file)74b7e04f8cSWim Van Sebroeck static int sa1100dog_open(struct inode *inode, struct file *file)
75b7e04f8cSWim Van Sebroeck {
76b7e04f8cSWim Van Sebroeck 	if (test_and_set_bit(1, &sa1100wdt_users))
77b7e04f8cSWim Van Sebroeck 		return -EBUSY;
78b7e04f8cSWim Van Sebroeck 
79b7e04f8cSWim Van Sebroeck 	/* Activate SA1100 Watchdog timer */
80e86bd43bSArnd Bergmann 	sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
81e86bd43bSArnd Bergmann 	sa1100_wr(OSSR_M3, REG_OSSR);
82e86bd43bSArnd Bergmann 	sa1100_wr(OWER_WME, REG_OWER);
83e86bd43bSArnd Bergmann 	sa1100_wr(sa1100_rd(REG_OIER) | OIER_E3, REG_OIER);
84c5bf68feSKirill Smelkov 	return stream_open(inode, file);
85b7e04f8cSWim Van Sebroeck }
86b7e04f8cSWim Van Sebroeck 
87b7e04f8cSWim Van Sebroeck /*
88b7e04f8cSWim Van Sebroeck  * The watchdog cannot be disabled.
89b7e04f8cSWim Van Sebroeck  *
90b7e04f8cSWim Van Sebroeck  * Previous comments suggested that turning off the interrupt by
91e86bd43bSArnd Bergmann  * clearing REG_OIER[E3] would prevent the watchdog timing out but this
92b7e04f8cSWim Van Sebroeck  * does not appear to be true (at least on the PXA255).
93b7e04f8cSWim Van Sebroeck  */
sa1100dog_release(struct inode * inode,struct file * file)94b7e04f8cSWim Van Sebroeck static int sa1100dog_release(struct inode *inode, struct file *file)
95b7e04f8cSWim Van Sebroeck {
9627c766aaSJoe Perches 	pr_crit("Device closed - timer will not stop\n");
97b7e04f8cSWim Van Sebroeck 	clear_bit(1, &sa1100wdt_users);
98b7e04f8cSWim Van Sebroeck 	return 0;
99b7e04f8cSWim Van Sebroeck }
100b7e04f8cSWim Van Sebroeck 
sa1100dog_write(struct file * file,const char __user * data,size_t len,loff_t * ppos)101f19e0312SAlan Cox static ssize_t sa1100dog_write(struct file *file, const char __user *data,
102f19e0312SAlan Cox 						size_t len, loff_t *ppos)
103b7e04f8cSWim Van Sebroeck {
104b7e04f8cSWim Van Sebroeck 	if (len)
105b7e04f8cSWim Van Sebroeck 		/* Refresh OSMR3 timer. */
106e86bd43bSArnd Bergmann 		sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
107b7e04f8cSWim Van Sebroeck 	return len;
108b7e04f8cSWim Van Sebroeck }
109b7e04f8cSWim Van Sebroeck 
110f19e0312SAlan Cox static const struct watchdog_info ident = {
111f19e0312SAlan Cox 	.options	= WDIOF_CARDRESET | WDIOF_SETTIMEOUT
112f19e0312SAlan Cox 				| WDIOF_KEEPALIVEPING,
113b7e04f8cSWim Van Sebroeck 	.identity	= "SA1100/PXA255 Watchdog",
114a6f052e3SRaphael Assenat 	.firmware_version	= 1,
115b7e04f8cSWim Van Sebroeck };
116b7e04f8cSWim Van Sebroeck 
sa1100dog_ioctl(struct file * file,unsigned int cmd,unsigned long arg)117f19e0312SAlan Cox static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
118f19e0312SAlan Cox 							unsigned long arg)
119b7e04f8cSWim Van Sebroeck {
120b7e04f8cSWim Van Sebroeck 	int ret = -ENOTTY;
121b7e04f8cSWim Van Sebroeck 	int time;
122b7e04f8cSWim Van Sebroeck 	void __user *argp = (void __user *)arg;
123b7e04f8cSWim Van Sebroeck 	int __user *p = argp;
124b7e04f8cSWim Van Sebroeck 
125b7e04f8cSWim Van Sebroeck 	switch (cmd) {
126b7e04f8cSWim Van Sebroeck 	case WDIOC_GETSUPPORT:
127b7e04f8cSWim Van Sebroeck 		ret = copy_to_user(argp, &ident,
128b7e04f8cSWim Van Sebroeck 				   sizeof(ident)) ? -EFAULT : 0;
129b7e04f8cSWim Van Sebroeck 		break;
130b7e04f8cSWim Van Sebroeck 
131b7e04f8cSWim Van Sebroeck 	case WDIOC_GETSTATUS:
132b7e04f8cSWim Van Sebroeck 		ret = put_user(0, p);
133b7e04f8cSWim Van Sebroeck 		break;
134b7e04f8cSWim Van Sebroeck 
135b7e04f8cSWim Van Sebroeck 	case WDIOC_GETBOOTSTATUS:
136b7e04f8cSWim Van Sebroeck 		ret = put_user(boot_status, p);
137b7e04f8cSWim Van Sebroeck 		break;
138b7e04f8cSWim Van Sebroeck 
1390c06090cSWim Van Sebroeck 	case WDIOC_KEEPALIVE:
140e86bd43bSArnd Bergmann 		sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
1410c06090cSWim Van Sebroeck 		ret = 0;
1420c06090cSWim Van Sebroeck 		break;
1430c06090cSWim Van Sebroeck 
144b7e04f8cSWim Van Sebroeck 	case WDIOC_SETTIMEOUT:
145b7e04f8cSWim Van Sebroeck 		ret = get_user(time, p);
146b7e04f8cSWim Van Sebroeck 		if (ret)
147b7e04f8cSWim Van Sebroeck 			break;
148b7e04f8cSWim Van Sebroeck 
149a6f052e3SRaphael Assenat 		if (time <= 0 || (oscr_freq * (long long)time >= 0xffffffff)) {
150b7e04f8cSWim Van Sebroeck 			ret = -EINVAL;
151b7e04f8cSWim Van Sebroeck 			break;
152b7e04f8cSWim Van Sebroeck 		}
153b7e04f8cSWim Van Sebroeck 
15428a62385SEric Miao 		pre_margin = oscr_freq * time;
155e86bd43bSArnd Bergmann 		sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3);
156bd490f82SGustavo A. R. Silva 		fallthrough;
157b7e04f8cSWim Van Sebroeck 
158b7e04f8cSWim Van Sebroeck 	case WDIOC_GETTIMEOUT:
15928a62385SEric Miao 		ret = put_user(pre_margin / oscr_freq, p);
160b7e04f8cSWim Van Sebroeck 		break;
161b7e04f8cSWim Van Sebroeck 	}
162b7e04f8cSWim Van Sebroeck 	return ret;
163b7e04f8cSWim Van Sebroeck }
164b7e04f8cSWim Van Sebroeck 
165f19e0312SAlan Cox static const struct file_operations sa1100dog_fops = {
166b7e04f8cSWim Van Sebroeck 	.owner		= THIS_MODULE,
167b7e04f8cSWim Van Sebroeck 	.llseek		= no_llseek,
168b7e04f8cSWim Van Sebroeck 	.write		= sa1100dog_write,
169f19e0312SAlan Cox 	.unlocked_ioctl	= sa1100dog_ioctl,
170b6dfb247SArnd Bergmann 	.compat_ioctl	= compat_ptr_ioctl,
171b7e04f8cSWim Van Sebroeck 	.open		= sa1100dog_open,
172b7e04f8cSWim Van Sebroeck 	.release	= sa1100dog_release,
173b7e04f8cSWim Van Sebroeck };
174b7e04f8cSWim Van Sebroeck 
175f19e0312SAlan Cox static struct miscdevice sa1100dog_miscdev = {
176b7e04f8cSWim Van Sebroeck 	.minor		= WATCHDOG_MINOR,
177b7e04f8cSWim Van Sebroeck 	.name		= "watchdog",
178b7e04f8cSWim Van Sebroeck 	.fops		= &sa1100dog_fops,
179b7e04f8cSWim Van Sebroeck };
180b7e04f8cSWim Van Sebroeck 
181e86bd43bSArnd Bergmann static int margin = 60;		/* (secs) Default is 1 minute */
1826924089cSRobert Jarzmik static struct clk *clk;
183b7e04f8cSWim Van Sebroeck 
sa1100dog_probe(struct platform_device * pdev)184e86bd43bSArnd Bergmann static int sa1100dog_probe(struct platform_device *pdev)
185b7e04f8cSWim Van Sebroeck {
186b7e04f8cSWim Van Sebroeck 	int ret;
187e86bd43bSArnd Bergmann 	int *platform_data;
188e86bd43bSArnd Bergmann 	struct resource *res;
189e86bd43bSArnd Bergmann 
190e86bd43bSArnd Bergmann 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
191e86bd43bSArnd Bergmann 	if (!res)
192e86bd43bSArnd Bergmann 		return -ENXIO;
193e86bd43bSArnd Bergmann 	reg_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
194*dc14f0a2SChen Ni 	if (!reg_base)
195*dc14f0a2SChen Ni 		return -ENOMEM;
196b7e04f8cSWim Van Sebroeck 
1976924089cSRobert Jarzmik 	clk = clk_get(NULL, "OSTIMER0");
1986924089cSRobert Jarzmik 	if (IS_ERR(clk)) {
1996924089cSRobert Jarzmik 		pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n",
2006924089cSRobert Jarzmik 		       (int) PTR_ERR(clk));
2016924089cSRobert Jarzmik 		return PTR_ERR(clk);
2026924089cSRobert Jarzmik 	}
2036924089cSRobert Jarzmik 
2046924089cSRobert Jarzmik 	ret = clk_prepare_enable(clk);
2056924089cSRobert Jarzmik 	if (ret) {
2066924089cSRobert Jarzmik 		pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n",
2076924089cSRobert Jarzmik 		       ret);
2086924089cSRobert Jarzmik 		goto err;
2096924089cSRobert Jarzmik 	}
2106924089cSRobert Jarzmik 
2116924089cSRobert Jarzmik 	oscr_freq = clk_get_rate(clk);
21228a62385SEric Miao 
213e86bd43bSArnd Bergmann 	platform_data = pdev->dev.platform_data;
214e86bd43bSArnd Bergmann 	if (platform_data && *platform_data)
215e86bd43bSArnd Bergmann 		boot_status = WDIOF_CARDRESET;
21628a62385SEric Miao 	pre_margin = oscr_freq * margin;
217b7e04f8cSWim Van Sebroeck 
218b7e04f8cSWim Van Sebroeck 	ret = misc_register(&sa1100dog_miscdev);
219027d89d9SVladimir Zapolskiy 	if (ret == 0) {
22027c766aaSJoe Perches 		pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
221b7e04f8cSWim Van Sebroeck 			margin);
222027d89d9SVladimir Zapolskiy 		return 0;
223027d89d9SVladimir Zapolskiy 	}
224027d89d9SVladimir Zapolskiy 
2256924089cSRobert Jarzmik 	clk_disable_unprepare(clk);
226027d89d9SVladimir Zapolskiy err:
2276924089cSRobert Jarzmik 	clk_put(clk);
2286924089cSRobert Jarzmik 	return ret;
229b7e04f8cSWim Van Sebroeck }
230b7e04f8cSWim Van Sebroeck 
sa1100dog_remove(struct platform_device * pdev)2314dca58a8SUwe Kleine-König static void sa1100dog_remove(struct platform_device *pdev)
232b7e04f8cSWim Van Sebroeck {
233b7e04f8cSWim Van Sebroeck 	misc_deregister(&sa1100dog_miscdev);
2346924089cSRobert Jarzmik 	clk_disable_unprepare(clk);
2356924089cSRobert Jarzmik 	clk_put(clk);
236b7e04f8cSWim Van Sebroeck }
237b7e04f8cSWim Van Sebroeck 
23874b31987Ssunliming static struct platform_driver sa1100dog_driver = {
239e86bd43bSArnd Bergmann 	.driver.name = "sa1100_wdt",
240e86bd43bSArnd Bergmann 	.probe	  = sa1100dog_probe,
2414dca58a8SUwe Kleine-König 	.remove_new	  = sa1100dog_remove,
242e86bd43bSArnd Bergmann };
243e86bd43bSArnd Bergmann module_platform_driver(sa1100dog_driver);
244b7e04f8cSWim Van Sebroeck 
245b7e04f8cSWim Van Sebroeck MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
246b7e04f8cSWim Van Sebroeck MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");
247b7e04f8cSWim Van Sebroeck 
248b7e04f8cSWim Van Sebroeck module_param(margin, int, 0);
249b7e04f8cSWim Van Sebroeck MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
250b7e04f8cSWim Van Sebroeck 
251b7e04f8cSWim Van Sebroeck MODULE_LICENSE("GPL");
252