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/openbmc/linux/Documentation/devicetree/bindings/iio/dac/
H A Dmicrochip,mcp4725.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomas Novotny <tomas@novotny.cz>
15 - microchip,mcp4725
16 - microchip,mcp4726
21 vdd-supply:
24 For the mcp4726 it will be used as the reference voltage if vref-supply
27 vref-supply:
29 Vref pin is used as a voltage reference when this supply is specified.
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/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7949.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Charles-Antoine Couret <charles-antoine.couret@essensium.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf
22 - adi,ad7682
23 - adi,ad7689
24 - adi,ad7949
29 vrefin-supply:
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H A Dadi,ad7192.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
21 - adi,ad7190
22 - adi,ad7192
23 - adi,ad7193
24 - adi,ad7195
29 spi-cpol: true
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/openbmc/linux/drivers/iio/pressure/
H A Dzpa2326.c1 // SPDX-License-Identifier: GPL-2.0-only
34 * - get device out of low power mode,
35 * - setup hardware sampling period,
36 * - at end of period, upon data ready interrupt: pop pressure samples out of
38 * - when no longer needed, stop sampling process by putting device into
70 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
78 * struct zpa2326_frequency - Hardware sampling frequency descriptor
102 ARRAY_SIZE(zpa2326_sampling_frequencies) - 1]; in zpa2326_highest_frequency()
106 * struct zpa2326_private - Per-device internal private state
107 * @timestamp: Buffered samples ready datum.
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/openbmc/linux/drivers/iio/adc/
H A Dad7949.c1 // SPDX-License-Identifier: GPL-2.0
2 /* ad7949.c - Analog Devices ADC driver 14/16 bits 4/8 channels
6 * https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf
33 /* BW: select bandwidth for low-pass filter. Full or Quarter */
68 * struct ad7949_adc_chip - AD ADC chip
70 * @vref: regulator generating Vref
78 * @buf8b: be16 buffer to exchange data with the device in 8-bit transfers
82 struct regulator *vref; member
98 ad7949_adc->cfg = (val & mask) | (ad7949_adc->cfg & ~mask); in ad7949_spi_write_cfg()
100 switch (ad7949_adc->spi->bits_per_word) { in ad7949_spi_write_cfg()
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H A Dad7124.c1 // SPDX-License-Identifier: GPL-2.0+
175 struct regulator *vref[4]; member
203 .name = "ad7124-4",
208 .name = "ad7124-8",
224 diff_new = abs(val - array[i]); in ad7124_find_closest_match()
243 ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval); in ad7124_spi_write_mask()
250 return ad_sd_write_reg(&st->sd, addr, bytes, readval); in ad7124_spi_write_mask()
258 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_set_mode()
259 st->adc_control |= AD7124_ADC_CTRL_MODE(mode); in ad7124_set_mode()
261 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_set_mode()
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H A Dmax11410.c1 // SPDX-License-Identifier: GPL-2.0-only
175 /* This driver only needs to write 8-bit registers */ in max11410_write_reg()
177 return -EINVAL; in max11410_write_reg()
179 return regmap_write(st->regmap, reg, val); in max11410_write_reg()
188 ret = regmap_bulk_read(st->regmap, reg, &st->scan.data, 3); in max11410_read_reg()
192 *val = get_unaligned_be24(&st->scan.data); in max11410_read_reg()
196 return regmap_read(st->regmap, reg, val); in max11410_read_reg()
204 return st->avdd; in max11410_get_vrefp()
206 return st->vrefp[refsel]; in max11410_get_vrefp()
215 return st->vrefn[refsel]; in max11410_get_vrefn()
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H A Dad7791.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
71 .differential = (_channel2 == -1 ? 0 : 1), \
99 __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \
111 __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \
244 st->mode &= ~AD7791_MODE_SEL_MASK; in ad7791_set_mode()
245 st->mode |= AD7791_MODE_SEL(mode); in ad7791_set_mode()
247 return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode); in ad7791_set_mode()
263 bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR); in ad7791_read_raw()
271 * Unipolar: 0 to VREF in ad7791_read_raw()
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H A Dmax1363.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2008-2010 Jonathan Cameron
7 * Copyright (C) 2002-2004 Stefan Eletzhofer
51 /* think about including max11600 etc - more settings */
58 /* max1363 only - though don't care on others.
79 /* max123{6-9} only */
82 /* max1363 only - merely part of channel selects or don't care for others */
87 /* max1363 strictly 0x06 - but doesn't matter */
94 * struct max1363_mode - scan mode information
122 * struct max1363_chip_info - chip specifc information
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H A Dad7192.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2011-2015 Analog Devices Inc.
32 #define AD7192_REG_COMM 0 /* Communications Register (WO, 8-bit) */
33 #define AD7192_REG_STAT 0 /* Status Register (RO, 8-bit) */
34 #define AD7192_REG_MODE 1 /* Mode Register (RW, 24-bit */
35 #define AD7192_REG_CONF 2 /* Configuration Register (RW, 24-bit) */
36 #define AD7192_REG_DATA 3 /* Data Register (RO, 24/32-bit) */
37 #define AD7192_REG_ID 4 /* ID Register (RO, 8-bit) */
38 #define AD7192_REG_GPOCON 5 /* GPOCON Register (RO, 8-bit) */
39 #define AD7192_REG_OFFSET 6 /* Offset Register (RW, 16-bit */
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H A Dti-ads7924.c1 // SPDX-License-Identifier: GPL-2.0
3 * IIO driver for Texas Instruments ADS7924 ADC, 12-bit, 4-Channels, I2C
8 * based on iio/adc/ti-ads1015.c
98 * The power-up time is allowed to elapse whenever the device has been shutdown
99 * in idle mode. Power-up time can allow external circuits, such as an
103 * If a power-up time is not required, set the bits to '0' to effectively bypass.
137 /* GPIO descriptor for device hard-reset pin. */
141 * Protects ADC ops, e.g: concurrent sysfs/buffered
147 * Set to true when the ADC is switched to the continuous-conversion
148 * mode and exits from a power-down state. This flag is used to avoid
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H A Dmxs-lradc-adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <linux/mfd/mxs-lradc.h>
32 * Make this runtime configurable if necessary. Currently, if the buffered mode
43 "mxs-lradc-channel0",
44 "mxs-lradc-channel1",
45 "mxs-lradc-channel2",
46 "mxs-lradc-channel3",
47 "mxs-lradc-channel4",
48 "mxs-lradc-channel5",
52 "mxs-lradc-thresh0",
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/openbmc/linux/drivers/iio/dac/
H A Dmcp4725.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mcp4725.c - Support for Microchip MCP4725/6
9 * driver for the Microchip I2C 12-bit digital-to-analog converter (DAC)
10 * (7-bit I2C slave address 0x60, the three LSBs can be configured in
52 outbuf[0] = (data->powerdown_mode + 1) << 4; in mcp4725_suspend()
54 data->powerdown = true; in mcp4725_suspend()
56 ret = i2c_master_send(data->client, outbuf, 2); in mcp4725_suspend()
60 return -EIO; in mcp4725_suspend()
72 outbuf[0] = (data->dac_value >> 8) & 0xf; in mcp4725_resume()
73 outbuf[1] = data->dac_value & 0xff; in mcp4725_resume()
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