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/openbmc/linux/Documentation/driver-api/
H A Dptp.rst1 .. SPDX-License-Identifier: GPL-2.0
9 presents a standardized method for developing PTP user space
14 drivers and a user space interface. The infrastructure supports a
18 - Set time
19 - Get time
20 - Shift the clock by a given offset atomically
21 - Adjust clock frequency
24 - Time stamp external events
25 - Period output signals configurable from user space
26 - Low Pass Filter (LPF) access from user space
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,5p35023.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas 5p35023 VersaClock 3 programmable I2C clock generator
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 The 5P35023 is a VersaClock programmable clock generator and
14 is designed for low-power, consumer, and high-performance PCI
16 architecture design, and each PLL is individually programmable
19 An internal OTP memory allows the user to store the configuration
20 in the device. After power up, the user can change the device register
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/openbmc/u-boot/doc/
H A DREADME.atmel_pmecc1 How to enable PMECC(Programmable Multibit ECC) for nand on Atmel SoCs
2 -----------------------------------------------------------
3 2012-08-22 Josh Wu <josh.wu@atmel.com>
5 The Programmable Multibit ECC (PMECC) controller is a programmable binary
12 - AT91SAM9X25, X35, G25, G15, G35 (tested)
13 - AT91SAM9N12 (not tested, Should work)
17 To use PMECC in this driver, the user needs to set:
30 How to enable PMECC header for direct programmable boot.bin
31 -----------------------------------------------------------
32 2014-05-19 Andreas Bießmann <andreas@biessmann.org>
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H A DREADME.N12137 - 16-/32-bit mixable instruction format.
8 - 32 general-purpose 32-bit registers.
9 - 8-stage pipeline.
10 - Dynamic branch prediction.
11 - 32/64/128/256 BTB.
12 - Return address stack (RAS).
13 - Vector interrupts for internal/external.
15 - 3 HW-level nested interruptions.
16 - User and super-user mode support.
17 - Memory-mapped I/O.
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/openbmc/linux/sound/soc/atmel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
31 in PDC mode configured using audio-graph-card in device-tree.
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
49 Say Y if you want to add support for SoC audio on WM8731-based
63 tristate "SoC Audio support for WM8731-based at91sam9x5 board"
91 tristate "ASoC driver for the Axentia TSE-850"
98 Axentia TSE-850 with a PCM5142 codec.
110 tristate "Support for Mikroe-PROTO board"
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/openbmc/linux/Documentation/watchdog/
H A Dmlx-wdt.rst11 Mellanox watchdog device is implemented in a programmable logic device.
19 Get time-left isn't supported
23 a user-defined timeout.
25 Get time-left is supported.
50 user space application.
54 This mlx-wdt driver supports both HW watchdog implementations.
58 Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux),
61 version - type1 or type2.
66 Programmable logic device registers have little-endian order.
/openbmc/linux/Documentation/admin-guide/laptops/
H A Dsonypi.rst2 Sony Programmable I/O Control Device Driver Readme
5 - Copyright (C) 2001-2004 Stelian Pop <stelian@popies.net>
6 - Copyright (C) 2001-2002 Alcôve <www.alcove.com>
7 - Copyright (C) 2001 Michael Ashley <m.ashley@unsw.edu.au>
8 - Copyright (C) 2001 Junichi Morita <jun1m@mars.dti.ne.jp>
9 - Copyright (C) 2000 Takaya Kinjo <t-kinjo@tc4.so-net.ne.jp>
10 - Copyright (C) 2000 Andrew Tridgell <tridge@samba.org>
12 This driver enables access to the Sony Programmable I/O Control Device which
17 It will give access (through a user space utility) to some events those laptops
20 - jogdial events (the small wheel on the side of Vaios)
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/openbmc/linux/drivers/mtd/chips/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
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/openbmc/linux/Documentation/hwmon/
H A Dmlxreg-fan.rst1 Kernel driver mlxreg-fan
6 - QMB700, equipped with 40x200GbE InfiniBand ports;
7 - MSN3700, equipped with 32x200GbE or 16x400GbE Ethernet ports;
8 - MSN3410, equipped with 6x400GbE plus 48x50GbE Ethernet ports;
9 - MSN3800, equipped with 64x1000GbE Ethernet ports;
14 board with Mellanox Quantum or Spectrume-2 devices.
15 FAN controller is implemented by the programmable device logic.
17 The default registers offsets set within the programmable device is as
36 This setup can be re-programmed with other registers.
39 -----------
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H A Dpc87360.rst22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
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H A Dw83791d.rst10 Addresses scanned: I2C 0x2c - 0x2f
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83791D_W83791Gb.pdf
22 - Frodo Looijaard <frodol@dds.nl>,
23 - Philip Edelbrock <phil@netroedge.com>,
24 - Mark Studebaker <mdsxyz123@yahoo.com>
28 - Shane Huang (Winbond),
29 - Rudolf Marek <r.marek@assembler.cz>
33 - Sven Anders <anders@anduras.de>
34 - Marc Hulsman <m.hulsman@tudelft.nl>
37 -----------------
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H A Dw83781d.rst10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83781d.pdf
18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/w83783s.pdf
34 Addresses scanned: I2C 0x28 - 0x2f
42 - Frodo Looijaard <frodol@dds.nl>,
43 - Philip Edelbrock <phil@netroedge.com>,
44 - Mark Studebaker <mdsxyz123@yahoo.com>
47 -----------------
67 -----------
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/openbmc/linux/drivers/mtd/maps/
H A Dsun_uflash.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sun_uflash.c - Driver for user-programmable flash on
5 * This driver does NOT provide access to the OBP-flash for
6 * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead.
31 #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */
34 MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets");
45 .name = "SUNW,???-????",
54 if (op->resource[1].flags) { in uflash_devinit()
55 /* Non-CFI userflash device-- once I find one we in uflash_devinit()
59 dp, (unsigned long long)op->resource[0].start); in uflash_devinit()
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/openbmc/u-boot/include/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
45 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
59 * struct mtd_write_req - data structure for requesting a write operation
64 * @usr_data: user-provided data buffer
65 * @usr_oob: user-provided OOB buffer
70 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
71 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
150 /* Write out-of-band data from MTD */
152 /* Read out-of-band data from MTD */
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/openbmc/linux/include/uapi/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
95 * struct mtd_read_req_ecc_stats - ECC statistics for a read operation
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/openbmc/linux/drivers/fpga/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
52 FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
88 tristate "Technologic Systems TS-73xx SBC FPGA Manager"
92 present on the TS-73xx SBC boards.
128 safely handles AXI4MM and AXI4-Lite interfaces on a
161 Select this option to enable common support for Field-Programmable
198 implements AFU and Port management features. A User AFU connects
208 PAC (Programmable Acceleration Card) N3000. It communicates
210 the card. It also instantiates the SPI master (spi-altera) for
217 Select this option to enable PCIe driver for PCIe-based
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-power5 Contact: linux-pm@vger.kernel.org
14 Contact: linux-pm@vger.kernel.org
23 Contact: linux-pm@vger.kernel.org
32 Contact: linux-pm@vger.kernel.org
43 Contact: linux-pm@vger.kernel.org
66 Contact: linux-pm@vger.kernel.org
81 Contact: linux-pm@vger.kernel.org
94 read-only reporting, unless the 'online' state of the supply
95 is set to be programmable, in which case this value can be set
106 Contact: linux-pm@vger.kernel.org
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H A Dsysfs-ptp23 attribute is to provide the user with a "friendly
41 Write integer to re-configure it.
61 This file contains the number of programmable periodic
68 This file contains the number of programmable pins
88 This directory contains one file for each programmable
110 This write-only file enables or disables external
128 This write-only file enables or disables periodic
139 This write-only file enables or disables delivery of
H A Dsysfs-driver-jz4780-efuse1 What: /sys/devices/*/<our-device>/nvmem
4 Description: read-only access to the efuse on the Ingenic JZ4780 SoC
5 The SoC has a one time programmable 8K efuse that is
19 Users: any user space application which wants to read the Chip
/openbmc/linux/drivers/mtd/nand/raw/atmel/
H A Dpmecc.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
23 * Derived from Das U-Boot source code
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
27 * Add Programmable Multibit ECC support for various AT91 SoC
39 #define ATMEL_PMECC_OOBOFFSET_AUTO -1
59 int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op);
60 void atmel_pmecc_disable(struct atmel_pmecc_user *user);
61 int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user);
62 int atmel_pmecc_correct_sector(struct atmel_pmecc_user *user, int sector,
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/openbmc/linux/drivers/staging/axis-fifo/
H A Daxis-fifo.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx AXIS FIFO: interface to the Xilinx AXI-Stream FIFO IP core
12 /* ----------------------------
14 * ----------------------------
37 /* ----------------------------
39 * ----------------------------
47 /* ----------------------------
49 * ----------------------------
68 /* ----------------------------
70 * ----------------------------
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
19 User-defined MTD device name. Can be used to assign user friendly
24 '#address-cells':
27 '#size-cells':
34 - compatible
37 "@[0-9a-f]+$":
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/openbmc/linux/Documentation/devicetree/bindings/iio/dac/
H A Dadi,ad5758.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
19 spi-cpha: true
21 adi,dc-dc-mode:
25 Mode of operation of the dc-to-dc converter
31 Programmable Power Control (PPC)
32 In this mode, the VDPC+ voltage is user-programmable to a fixed level
47 adi,range-microvolt:
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/openbmc/qemu/linux-user/ppc/
H A Dcpu_loop.c2 * qemu user cpu loop
4 * Copyright (c) 2003-2008 Fabrice Bellard
23 #include "user-internals.h"
24 #include "cpu_loop-common.h"
25 #include "signal-common.h"
60 return -1; in ppc_dcr_read()
65 return -1; in ppc_dcr_write()
88 cpu_abort(cs, "Critical interrupt while in user mode. " in cpu_loop()
92 cpu_abort(cs, "Machine check exception while in user mode. " in cpu_loop()
99 env->spr[SPR_DAR]); in cpu_loop()
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/openbmc/qemu/docs/system/arm/
H A Dxlnx-versal-virt.rst1 Xilinx Versal Virt (``xlnx-versal-virt``)
4 Xilinx Versal is a family of heterogeneous multi-core SoCs
6 peripherals in a Processing System (PS) with runtime programmable
10 https://www.xilinx.com/products/silicon-devices/acap/versal.html
22 - 2 ACPUs (ARM Cortex-A72)
26 - Interrupt controller (ARM GICv3)
27 - 2 UARTs (ARM PL011)
28 - An RTC (Versal built-in)
29 - 2 GEMs (Cadence MACB Ethernet MACs)
30 - 8 ADMA (Xilinx zDMA) channels
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