Home
last modified time | relevance | path

Searched +full:tegra20 +full:- +full:sflash (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dnvidia,tegra20-sflash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/nvidia,tegra20-sflash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 SFLASH controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-sflash
25 - description: module clock
29 - description: module reset
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-pinmux
19 - description: tri-state registers
20 - description: mux register
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-tegra20-sflash.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI driver for Nvidia's Tegra20 Serial Flash Controller.
91 #define SPI_DMA_BLK_COUNT(count) (((count) - 1) & 0xFFFF)
142 return readl(tsd->base + reg); in tegra_sflash_readl()
148 writel(val, tsd->base + reg); in tegra_sflash_writel()
161 unsigned remain_len = t->len - tsd->cur_pos; in tegra_sflash_calculate_curr_xfer_param()
164 tsd->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8); in tegra_sflash_calculate_curr_xfer_param()
165 max_word = remain_len / tsd->bytes_per_word; in tegra_sflash_calculate_curr_xfer_param()
168 tsd->curr_xfer_words = max_word; in tegra_sflash_calculate_curr_xfer_param()
177 unsigned max_n_32bit = tsd->curr_xfer_words; in tegra_sflash_fill_tx_fifo_from_client_txbuf()
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG
8 # small core, mostly translating board-specific
10 obj-$(CONFIG_SPI_MASTER) += spi.o
11 obj-$(CONFIG_SPI_MEM) += spi-mem.o
12 obj-$(CONFIG_SPI_MUX) += spi-mux.o
13 obj-$(CONFIG_SPI_SPIDEV) += spidev.o
14 obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi-loopback-test.o
17 obj-$(CONFIG_SPI_ALTERA) += spi-altera-platform.o
18 obj-$(CONFIG_SPI_ALTERA_CORE) += spi-altera-core.o
[all …]
/openbmc/u-boot/drivers/spi/
H A Dtegra20_sflash.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2010-2013 NVIDIA Corporation
15 #include <asm/arch-tegra/clk_rst.h>
79 /* Tegra20 SPI-Flash - only 1 device ('bus/cs') */ in tegra20_sflash_cs_info()
81 return -ENODEV; in tegra20_sflash_cs_info()
88 struct tegra_spi_platdata *plat = bus->platdata; in tegra20_sflash_ofdata_to_platdata()
89 const void *blob = gd->fdt_blob; in tegra20_sflash_ofdata_to_platdata()
92 plat->base = devfdt_get_addr(bus); in tegra20_sflash_ofdata_to_platdata()
93 plat->periph_id = clock_decode_periph_id(bus); in tegra20_sflash_ofdata_to_platdata()
95 if (plat->periph_id == PERIPH_ID_NONE) { in tegra20_sflash_ofdata_to_platdata()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20.dtsi1 #include <dt-bindings/clock/tegra20-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 compatible = "nvidia,tegra20";
10 interrupt-parent = <&lic>;
13 compatible = "nvidia,tegra20-host1x", "simple-bus";
19 reset-names = "host1x";
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
H A Dtegra20-ventana.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
7 model = "NVIDIA Tegra20 Ventana evaluation board";
8 compatible = "nvidia,ventana", "nvidia,tegra20";
11 stdout-path = &uartd;
38 display-timings {
41 clock-frequency = <70600000>;
44 hback-porch = <58>;
45 hfront-porch = <58>;
[all …]
H A Dtegra20-seaboard.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
31 stdout-path = &uartd;
47 display-timings {
50 clock-frequency = <70600000>;
53 hback-porch = <58>;
54 hfront-porch = <58>;
55 hsync-len = <58>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6 #include "tegra20-cpu-opp.dtsi"
10 compatible = "compulab,trimslice", "nvidia,tegra20";
19 stdout-path = "serial0:115200n8";
30 vdd-supply = <&hdmi_vdd_reg>;
31 pll-supply = <&hdmi_pll_reg>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
H A Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
13 interrupt-parent = <&lic>;
[all …]
H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
6 #include "tegra20.dtsi"
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
11 model = "NVIDIA Tegra20 Ventana evaluation board";
12 compatible = "nvidia,ventana", "nvidia,tegra20";
21 stdout-path = "serial0:115200n8";
[all …]
H A Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "acer,picasso", "nvidia,tegra20";
[all …]
H A Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "asus,tf101", "nvidia,tegra20";
[all …]
H A Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
9 compatible = "nvidia,seaboard", "nvidia,tegra20";
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0+
6 /* Tegra20 pin multiplexing functions */
151 MUXCTL_NONE = -1,
253 PUCTL_NONE = -1
269 /* A normal pin group where the mux name and pull-up name match */
273 /* A pin group where the pull-up name doesn't have a 1-1 mapping */
317 PIN(GMC, UARTD, SPI4, GMI, SFLASH),
354 PIN(GMD, RSVD1, NAND, GMI, SFLASH),
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinctrl data for the NVIDIA Tegra20 pinmux
7 * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
14 #include <linux/clk-provider.h>
21 #include "pinctrl-tegra.h"
254 /* All non-GPIO pins follow */
1942 FUNCTION(sflash),
1967 /* Pin group with mux control, and typically tri-state and pull-up/down too */
1980 .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \
1983 .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \
[all …]
/openbmc/linux/
H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
[all...]