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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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H A Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
40 - ti,am62-r5fss
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H A Dst,stm32-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Fabien Dessenne <fabien.dessenne@foss.st.com>
15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
19 const: st,stm32mp1-m4
23 Address ranges of the RETRAM and MCU SRAM memories used by the remote
31 reset-names:
33 - const: mcu_rst
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek.txt5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6 - clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
15 - proc-supply: Regulator for Vproc of CPU cluster.
18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
23 - mediatek,cci:
30 - #cooling-cells:
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
26 stdout-path = "serial0:921600n8";
31 compatible = "linaro,optee-tz";
36 gpio-keys {
[all …]
H A Dmt8173-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 chassis-type = "embedded";
14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
31 compatible = "hdmi-connector";
37 remote-endpoint = <&hdmi0_out>;
43 compatible = "linux,extcon-usb-gpio";
44 id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
47 usb_p1_vbus: regulator-usb-p1 {
[all …]
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,cci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jia-Wei Chang <jia-wei.chang@mediatek.com>
11 - Johnson Wang <johnson.wang@mediatek.com>
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
26 - description:
28 - description:
33 clock-names:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmediatek,mt6357-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/mediatek,mt6357-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen Zhong <chen.zhong@mediatek.com>
11 - Fabien Parent <fabien.parent@linaro.org>
12 - Alexandre Mergnat <amergnat@baylibre.com>
17 - buck-<name>
18 - ldo-<name>.
22 "^buck-v(core|modem|pa|proc|s1)$":
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/openbmc/linux/drivers/devfreq/
H A Dmtk-cci-devfreq.c1 // SPDX-License-Identifier: GPL-2.0-only
41 const struct mtk_ccifreq_platform_data *soc_data = drv->soc_data; in mtk_ccifreq_set_voltage()
42 struct device *dev = drv->dev; in mtk_ccifreq_set_voltage()
44 int retry_max = drv->vtrack_max; in mtk_ccifreq_set_voltage()
46 if (!drv->sram_reg) { in mtk_ccifreq_set_voltage()
47 ret = regulator_set_voltage(drv->proc_reg, new_voltage, in mtk_ccifreq_set_voltage()
48 drv->soc_data->proc_max_volt); in mtk_ccifreq_set_voltage()
52 pre_voltage = regulator_get_voltage(drv->proc_reg); in mtk_ccifreq_set_voltage()
58 pre_vsram = regulator_get_voltage(drv->sram_reg); in mtk_ccifreq_set_voltage()
64 new_vsram = clamp(new_voltage + soc_data->min_volt_shift, in mtk_ccifreq_set_voltage()
[all …]
/openbmc/linux/drivers/soc/ti/
H A Dpm33xx.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
17 #include <linux/nvmem-consumer.h>
24 #include <linux/rtc/rtc-omap.h>
26 #include <linux/sram.h>
28 #include <linux/ti-emif-sram.h>
31 #include <asm/proc-fns.h>
35 #define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \
36 (unsigned long)pm_sram->do_wfi)
104 pm_sram->do_wfi, in am33xx_push_sram_idle()
[all …]
/openbmc/linux/sound/drivers/opl4/
H A Dopl4_proc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Functions for the OPL4 proc file
15 struct snd_opl4 *opl4 = entry->private_data; in snd_opl4_mem_proc_open()
17 mutex_lock(&opl4->access_mutex); in snd_opl4_mem_proc_open()
18 if (opl4->memory_access) { in snd_opl4_mem_proc_open()
19 mutex_unlock(&opl4->access_mutex); in snd_opl4_mem_proc_open()
20 return -EBUSY; in snd_opl4_mem_proc_open()
22 opl4->memory_access++; in snd_opl4_mem_proc_open()
23 mutex_unlock(&opl4->access_mutex); in snd_opl4_mem_proc_open()
30 struct snd_opl4 *opl4 = entry->private_data; in snd_opl4_mem_proc_release()
[all …]
/openbmc/linux/drivers/remoteproc/
H A Dti_k3_r5_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2022 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
9 #include <linux/dma-mapping.h>
19 #include <linux/omap-mailbox.h>
33 /* R5 TI-SCI Processor Configuration Flags */
47 /* R5 TI-SCI Processor Control Flags */
50 /* R5 TI-SCI Processor Status Flags */
59 * struct k3_r5_mem - internal memory structure
77 * Single-CPU mode : AM64x SoCs only
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,rpmcc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
17 #address-cells = <1>;
[all …]
H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
9 msmc_ram: sram@70000000 {
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
[all …]
H A Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 mcu_conf: scm-conf@40f00000 {
10 compatible = "syscon", "simple-mfd";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 compatible = "ti,am654-phy-gmii-sel";
19 #phy-cells = <1>;
25 compatible = "pinctrl-single";
27 #pinctrl-cells = <1>;
[all …]
H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
20 oc_sram: sram@70000000 {
21 compatible = "mmio-sram";
[all …]
H A Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
/openbmc/linux/drivers/cpufreq/
H A Dmediatek-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
33 * 100mV < Vsram - Vproc < 200mV
71 if (cpumask_test_cpu(cpu, &info->cpus)) in mtk_cpu_dvfs_info_lookup()
81 const struct mtk_cpufreq_platform_data *soc_data = info->soc_data; in mtk_cpufreq_voltage_tracking()
82 struct regulator *proc_reg = info->proc_reg; in mtk_cpufreq_voltage_tracking()
83 struct regulator *sram_reg = info->sram_reg; in mtk_cpufreq_voltage_tracking()
85 int retry = info->vtrack_max; in mtk_cpufreq_voltage_tracking()
89 dev_err(info->cpu_dev, in mtk_cpufreq_voltage_tracking()
96 dev_err(info->cpu_dev, "invalid Vsram value: %d\n", pre_vsram); in mtk_cpufreq_voltage_tracking()
[all …]
/openbmc/u-boot/board/freescale/m5373evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m5373evb/m5373evb.c Dram setup
13 - board/freescale/m5373evb/mii.c Mii access
14 - board/freescale/m5373evb/Makefile Makefile
15 - board/freescale/m5373evb/config.mk config make
16 - board/freescale/m5373evb/u-boot.lds Linker description
18 - arch/m68k/cpu/mcf532x/cpu.c cpu specific code
19 - arch/m68k/cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs
20 - arch/m68k/cpu/mcf532x/interrupts.c cpu specific interrupt support
21 - arch/m68k/cpu/mcf532x/speed.c system, pci, flexbus, and cpu clock
[all …]
/openbmc/linux/drivers/edac/
H A Dmce_amd.c1 // SPDX-License-Identifier: GPL-2.0-only
71 "PFB non-cacheable bit parity error",
101 "Link-defined sync error packets detected on HT link",
174 "An ECC error was detected on a data cache read-modify-write by a store",
179 "An ECC error was detected on an EMEM read-modify-write by a store",
200 "IC Microtag or Full Tag Multi-hit Error",
209 "L1 BTB Multi-Match Error",
210 "L2 BTB Multi-Match Error",
214 "L1-TLB Multi-Hit",
215 "L2-TLB Multi-Hit",
[all …]
/openbmc/u-boot/board/freescale/m54455evb/
H A DREADME4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m54455evb/m54455evb.c Dram setup, IDE pre init, and PCI init
13 - board/freescale/m54455evb/flash.c Atmel and INTEL flash support
14 - board/freescale/m54455evb/Makefile Makefile
15 - board/freescale/m54455evb/config.mk config make
16 - board/freescale/m54455evb/u-boot.lds Linker description
18 - common/cmd_bdinfo.c Clock frequencies output
19 - common/cmd_mii.c mii support
21 - arch/m68k/cpu/mcf5445x/cpu.c cpu specific code
22 - arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
[all …]

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