/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Brian Norris <briannorris@chromium.org> 15 - rockchip,rk3399-dmc 17 devfreq-events: 21 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt. 26 clock-names: 28 - const: dmc_clk [all …]
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/openbmc/linux/drivers/devfreq/ |
H A D | rk3399_dmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Lin Huang <hl@rock-chips.com> 7 #include <linux/arm-smccc.h> 12 #include <linux/devfreq-event.h> 28 #define NS_TO_CYCLE(NS, MHz) (((NS) * (MHz)) / NSEC_PER_USEC) argument 74 unsigned long old_clk_rate = dmcfreq->rate; in rk3399_dmcfreq_target() 92 if (dmcfreq->rate == target_rate) in rk3399_dmcfreq_target() 95 mutex_lock(&dmcfreq->lock); in rk3399_dmcfreq_target() 98 * Ensure power-domain transitions don't interfere with ARM Trusted in rk3399_dmcfreq_target() 99 * Firmware power-domain idling. in rk3399_dmcfreq_target() [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 19 stdout-path = "serial2:115200n8"; 28 * - Rails that only connect to the EC (or devices that the EC talks to) 30 * - Rails _are_ included if the rails go to the AP even if the AP 39 * - The EC controls the enable and the EC always enables a rail as 41 * - The rails are actually connected to each other by a jumper and 46 ppvar_sys: ppvar-sys { [all …]
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H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Chromebook shared properties 8 #include "rk3399-gru.dtsi" 11 pp900_ap: pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <900000>; 19 regulator-max-microvolt = <900000>; [all …]
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/openbmc/linux/drivers/spi/ |
H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0 5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved 175 #define STM32_SPI_MASTER_MODE(stm32_spi) (!(stm32_spi)->device_mode) 176 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode) 179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc 191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data 219 * struct stm32_spi_cfg - stm32 compatible configuration data 227 * @set_data_idleness: optional routine to configure registers to desired idle 268 * struct stm32_spi - private data of the SPI controller 278 * @cur_midi: master inter-data idleness in ns [all …]
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H A D | spi-cadence-quadspi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 // Copyright Altera Corporation (C) 2012-2014. All rights reserved. 6 // Copyright Intel Corporation (C) 2019-2020. All rights reserved. 7 // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com 12 #include <linux/dma-mapping.h> 16 #include <linux/firmware/xlnx-zynqmp.h> 30 #include <linux/spi/spi-mem.h> 33 #define CQSPI_NAME "cadence-qspi" 304 u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); in cqspi_is_idle() 311 u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL); in cqspi_get_rd_sram_level() [all …]
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/openbmc/linux/drivers/scsi/ |
H A D | wd33c93.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 * Drew Eckhardt's excellent 'Generic NCR5380' sources from Linux-PC 18 * - Target Disconnection/Reconnection is now supported. Any 21 * call 'adaptive disconnect' - meaning that each command 24 * device chooses), or as a "SCSI-bus-hog". 26 * - Synchronous data transfers are now supported. Because of 29 * this faster protocol - it can be enabled via the command- 30 * line on a device-by-device basis. 32 * - Runtime operating parameters can now be specified through 38 * - The old driver relied exclusively on what the Western Digital [all …]
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H A D | NCR5380.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * to implement 5380 SCSI drivers under Linux with a non-trantor 13 * +1 (303) 666-5836 24 * 1+ (719) 578-3400 25 * 1+ (800) 334-5454 42 * transfer - some PC's will use the I/O bus, 68K's must use 46 * each 5380 in the system - commands that haven't been issued yet, 51 * allowing multiple commands to propagate all the way to a SCSI-II device 57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead 78 * idle for too long, the system will try to sleep. [all …]
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/openbmc/linux/drivers/mmc/host/ |
H A D | atmel-mci.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2004-2008 Atmel Corporation 12 #include <linux/dma-mapping.h> 62 #define ATMCI_MR_PDCMODE BIT(15) /* PDC-oriented Mode */ 71 #define ATMCI_SDCBUS_1BIT (0 << 6) /* 1-bit data bus */ 72 #define ATMCI_SDCBUS_4BIT (2 << 6) /* 4-bit data bus */ 73 #define ATMCI_SDCBUS_8BIT (3 << 6) /* 8-bit data bus[2] */ 79 #define ATMCI_CMDR_RSPTYP_48BIT (1 << 6) /* 48-bit response */ 80 #define ATMCI_CMDR_RSPTYP_136BIT (2 << 6) /* 136-bit response */ 92 #define ATMCI_CMDR_BLOCK (0 << 19) /* Single-block transfer */ [all …]
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/openbmc/linux/drivers/gpu/drm/gma500/ |
H A D | psb_intel_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 39 #define GMBUS_HOLD_EXT (1<<7) /* 300ns hold time, rsvd on Pineview */ 70 #define GMBUS3 0x510c /* data buffer bytes 3-0 */ 155 * - PLL enabled 156 * - pipe enabled 157 * - LVDS/DVOB/DVOC on 256 * in DVO non-gang */ 413 * Programmed value is multiplier - 1, up to 5x. 442 /* Selects pipe B for LVDS data. Must be set on pre-965. */ 449 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per [all …]
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/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | evergreen.c | 61 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_rreg() 64 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_rreg() 72 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_wreg() 75 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_wreg() 83 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg() 86 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg() 94 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_wreg() 97 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_wreg() 105 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy1_rreg() 108 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy1_rreg() [all …]
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/openbmc/u-boot/arch/x86/cpu/quark/ |
H A D | smc.c | 1 // SPDX-License-Identifier: Intel 82 tck = t_ck[mrc_params->ddr_speed]; /* Clock in picoseconds */ in prog_ddr_timing_control() 83 tcl = mrc_params->params.cl; /* CAS latency in clocks */ in prog_ddr_timing_control() 86 tras = MCEIL(mrc_params->params.ras, tck); in prog_ddr_timing_control() 88 /* Per JEDEC: tWR=15000ps DDR2/3 from 800-1600 */ in prog_ddr_timing_control() 91 twtr = MCEIL(mrc_params->params.wtr, tck); in prog_ddr_timing_control() 92 trrd = MCEIL(mrc_params->params.rrd, tck); in prog_ddr_timing_control() 94 tfaw = MCEIL(mrc_params->params.faw, tck); in prog_ddr_timing_control() 96 wl = 5 + mrc_params->ddr_speed; in prog_ddr_timing_control() 99 dtr0 |= mrc_params->ddr_speed; in prog_ddr_timing_control() [all …]
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/openbmc/u-boot/drivers/ddr/altera/ |
H A D | sequencer.c | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright Altera Corporation (C) 2012-2015 44 * However, to support simulation-time selection of fast simulation mode, where 47 * check, which is based on the rtl-supplied value, or we dynamically compute 48 * the value to use based on the dynamically-chosen calibration mode 64 * non-skip and skip values 66 * The mask is set to include all bits when not-skipping, but is 70 static u16 skip_delay_mask; /* mask off bits when skipping/not-skipping */ 85 if (gbl->error_stage == CAL_STAGE_NIL) { in set_failing_group_stage() 86 gbl->error_substage = substage; in set_failing_group_stage() [all …]
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/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_main.c | 3 * Copyright (c) 2007-2013 Broadcom Corporation 36 #include <linux/dma-mapping.h> 83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw" 84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw" 85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw" 86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V15 ".fw" 87 #define FW_FILE_NAME_E1H_V15 "bnx2x/bnx2x-e1h-" FW_FILE_VERSION_V15 ".fw" 88 #define FW_FILE_NAME_E2_V15 "bnx2x/bnx2x-e2-" FW_FILE_VERSION_V15 ".fw" 117 MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X " 124 static int mrrs = -1; [all …]
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/openbmc/linux/arch/s390/kvm/ |
H A D | interrupt.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #define KMSG_COMPONENT "kvm-s390" 22 #include <asm/asm-offsets.h> 32 #include "kvm-s390.h" 34 #include "trace-s390.h" 52 read_lock(&vcpu->kvm->arch.sca_lock); in sca_ext_call_pending() 53 if (vcpu->kvm->arch.use_esca) { in sca_ext_call_pending() 54 struct esca_block *sca = vcpu->kvm->arch.sca; in sca_ext_call_pending() 56 sca->cpu[vcpu->vcpu_id].sigp_ctrl; in sca_ext_call_pending() 61 struct bsca_block *sca = vcpu->kvm->arch.sca; in sca_ext_call_pending() [all …]
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/openbmc/linux/drivers/video/fbdev/savage/ |
H A D | savagefb_driver.c | 2 * linux/drivers/video/savagefb.c -- S3 Savage Framebuffer Driver 4 * Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org> 16 * - hardware accelerated clear and move 19 * - wait for vertical retrace before writing to cr67 21 * - use synchronization registers cr23 and cr26 24 * - reset 3D engine 25 * - don't return alpha bits for 32bit format 28 * - added WaitIdle functions for all Savage types 29 * - do WaitIdle before mode switching 30 * - code cleanup [all …]
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/openbmc/linux/drivers/net/wireless/ath/ath11k/ |
H A D | mac.c | 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. 163 /* new addition in IEEE Std 802.11ax-2021 */ 243 #define ath11k_a_rates_size (ARRAY_SIZE(ath11k_legacy_rates) - 4) 407 return -EINVAL; in ath11k_mac_hw_ratecode_to_legacy_rate() 428 for (i = 0; i < sband->n_bitrates; i++) in ath11k_mac_bitrate_to_idx() 429 if (sband->bitrates[i].bitrate == bitrate) in ath11k_mac_bitrate_to_idx() 440 for (nss = IEEE80211_HT_MCS_MASK_LEN - 1; nss >= 0; nss--) in ath11k_mac_max_ht_nss() 452 for (nss = NL80211_VHT_NSS_MAX - 1; nss >= 0; nss--) in ath11k_mac_max_vht_nss() [all …]
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/openbmc/linux/include/net/ |
H A D | cfg80211.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 7 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net> 8 * Copyright 2013-2014 Intel Mobile Communications GmbH 9 * Copyright 2015-2017 Intel Deutschland GmbH 10 * Copyright (C) 2018-2021, 2023 Intel Corporation 72 * enum ieee80211_channel_flags - channel flags 150 * struct ieee80211_channel - channel definition 157 * @hw_value: hardware-specific value for the channel 193 * enum ieee80211_rate_flags - rate flags 226 * enum ieee80211_bss_type - BSS type filter [all …]
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/openbmc/linux/drivers/net/ethernet/sfc/ |
H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright 2009-2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 13 /* Power-on reset state */ 35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */ 38 /* The rest of these are firmware-defined */ 46 /* Values to be written to the per-port status dword in shared 71 * | | \--- Response 72 * | \------- Error 73 * \------------------------------ Resync (always set) [all …]
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/openbmc/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-03-16 03:00:36.730-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-16 03:00:36.828-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-03-15 03:00:37.236-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-15 03:00:37.352-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |