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/openbmc/u-boot/include/
H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common SPI Interface: Controller-specific definitions
14 /* SPI mode flags */
22 #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
25 #define SPI_SLAVE BIT(6) /* slave mode */
46 * struct dm_spi_platdata - platform data for all SPI slaves
48 * This describes a SPI slave, a child device of the SPI bus. To obtain this
50 * dev_get_parent_platdata(slave->dev).
55 * @cs: Chip select number (0..n-1)
56 * @max_hz: Maximum bus speed that this slave can tolerate
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/openbmc/u-boot/drivers/spi/
H A Dmpc8xxx_spi.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <spi.h>
17 #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
26 struct spi_slave *slave; in spi_setup_slave() local
31 slave = spi_alloc_slave_base(bus, cs); in spi_setup_slave()
32 if (!slave) in spi_setup_slave()
40 return slave; in spi_setup_slave()
43 void spi_free_slave(struct spi_slave *slave) in spi_free_slave() argument
45 free(slave); in spi_free_slave()
50 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; in spi_init() local
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H A Dspi-mem.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <spi.h>
15 #include <spi-mem.h>
20 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
22 * @ctlr: the SPI controller requesting this dma_map()
24 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
28 * This helper prepares everything for you and provides a ready-to-use
29 * sg_table. This function is not intended to be called from spi drivers.
30 * Only SPI controller drivers should use it.
32 * op->data.buf.{in,out} is DMA-able before calling this function.
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H A Dspi-uclass.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <spi.h>
11 #include <dm/device-internal.h>
12 #include <dm/uclass-internal.h>
26 if (ops->set_speed) in spi_set_speed_mode()
27 ret = ops->set_speed(bus, speed); in spi_set_speed_mode()
29 ret = -EINVAL; in spi_set_speed_mode()
35 if (ops->set_mode) in spi_set_speed_mode()
36 ret = ops->set_mode(bus, mode); in spi_set_speed_mode()
38 ret = -EINVAL; in spi_set_speed_mode()
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H A Dkirkwood_spi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
7 * Derived from drivers/spi/mpc8xxx_spi.c
13 #include <spi.h>
19 #include <asm/arch-mvebu/spi.h>
23 setbits_le32(&reg->ctrl, KWSPI_CSN_ACT); in _spi_cs_activate()
28 clrbits_le32(&reg->ctrl, KWSPI_CSN_ACT); in _spi_cs_deactivate()
43 * handle data in 8-bit chunks in _spi_xfer()
46 clrsetbits_le32(&reg->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE); in _spi_xfer()
52 /* Shift data so it's msb-justified */ in _spi_xfer()
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H A Ddavinci_spi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 * Driver for SPI controller on DaVinci. Based on atmel_spi.c
12 #include <spi.h>
70 * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
80 * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
92 /* davinci spi register set */
120 /* davinci spi slave */
123 struct spi_slave slave; member
126 unsigned int freq; /* current SPI bus frequency */
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H A Dsoft_spi_legacy.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <spi.h>
15 /*-----------------------------------------------------------------------
26 struct spi_slave slave; member
30 static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) in to_soft_spi() argument
32 return container_of(slave, struct soft_spi_slave, slave); in to_soft_spi()
51 ss->mode = mode; in spi_setup_slave()
55 return &ss->slave; in spi_setup_slave()
58 void spi_free_slave(struct spi_slave *slave) in spi_free_slave() argument
60 struct soft_spi_slave *ss = to_soft_spi(slave); in spi_free_slave()
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H A Dlpc32xx_ssp.c1 // SPDX-License-Identifier: GPL-2.0+
3 * LPC32xx SSP interface (SPI mode)
6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
13 #include <spi.h>
38 /* lpc32xx spi slave */
40 struct spi_slave slave; member
45 struct spi_slave *slave) in to_lpc32xx_spi_slave() argument
47 return container_of(slave, struct lpc32xx_spi_slave, slave); in to_lpc32xx_spi_slave()
59 pr_err("3-wire mode not supported"); in spi_setup_slave()
64 pr_err("slave mode not supported\n"); in spi_setup_slave()
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H A Dsh_qspi.c1 // SPDX-License-Identifier: GPL-2.0
3 * SH QSPI (Quad SPI) driver
12 #include <spi.h>
71 struct spi_slave slave; member
80 writeb(SPCR_MSTR, &ss->regs->spcr); in sh_qspi_init()
83 writeb(0x00, &ss->regs->sslp); in sh_qspi_init()
86 writeb(SPPCR_IO3FV|SPPCR_IO2FV, &ss->regs->sppcr); in sh_qspi_init()
89 writeb(0x01, &ss->regs->spbr); in sh_qspi_init()
92 writeb(0x00, &ss->regs->spdcr); in sh_qspi_init()
95 writeb(0x00, &ss->regs->spckd); in sh_qspi_init()
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/openbmc/linux/Documentation/spi/
H A Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
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H A Dpxa2xx.rst2 PXA2xx SPI on SSP driver HOWTO
6 synchronous serial port into an SPI master controller
7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx and compatible SSP.
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
17 is responsible for queuing SPI transactions and setting up and launching
21 -----------------------------------
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/openbmc/u-boot/drivers/power/
H A Dpower_spi.c1 // SPDX-License-Identifier: GPL-2.0+
9 * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
15 #include <spi.h>
17 static struct spi_slave *slave; variable
24 if (!slave) { in pmic_reg()
25 slave = spi_setup_slave(p->bus, p->hw.spi.cs, p->hw.spi.clk, in pmic_reg()
26 p->hw.spi.mode); in pmic_reg()
28 if (!slave) in pmic_reg()
29 return -ENODEV; in pmic_reg()
33 return -EINVAL; in pmic_reg()
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dmediatek,spi-slave-mt27xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Slave controller for MediaTek ARM SoCs
10 - Leilk Liu <leilk.liu@mediatek.com>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - mediatek,mt2712-spi-slave
19 - mediatek,mt8195-spi-slave
30 clock-names:
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H A Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Common Properties
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
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H A Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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/openbmc/linux/Documentation/devicetree/bindings/fpga/
H A Dxlnx,fpga-slave-serial.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Slave Serial SPI FPGA
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
13 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
14 over what is referred to as slave serial interface.The slave serial link is
15 not technically SPI, and might require extra circuits in order to play nicely
16 with other SPI slaves on the same bus.
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H A Dlattice-machxo2-spi.txt1 Lattice MachXO2 Slave SPI FPGA Manager
4 'slave SPI' interface.
9 - compatible: should contain "lattice,machxo2-slave-spi"
10 - reg: spi chip select of the FPGA
14 fpga-region0 {
15 compatible = "fpga-region";
16 fpga-mgr = <&fpga_mgr_spi>;
17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
21 spi1: spi@2000 {
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/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt1 SPI (Serial Peripheral Interface) busses
3 SPI busses can be described with a node for the SPI master device
4 and a set of child nodes for each SPI slave on the bus. For this
5 discussion, it is assumed that the system's SPI controller is in
6 SPI master mode. This binding does not describe SPI controllers
7 in slave mode.
9 The SPI master node requires the following properties:
10 - #address-cells - number of cells required to define a chip select
11 address on the SPI bus.
12 - #size-cells - should be zero.
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/openbmc/linux/drivers/spi/
H A Dspi-bitbang-txrx.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * simple SPI master driver. Two do polled word-at-a-time I/O:
6 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
7 * expanding the per-word routines from the inline templates below.
9 * - Drivers for controllers resembling bare shift registers. Provide
15 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
36 * A non-inlined routine would call bitbang_txrx_*() routines. The
49 bitbang_txrx_be_cpha0(struct spi_device *spi, in bitbang_txrx_be_cpha0() argument
55 u32 oldbit = (!(word & (1<<(bits-1)))) << 31; in bitbang_txrx_be_cpha0()
57 for (word <<= (32 - bits); likely(bits); bits--) { in bitbang_txrx_be_cpha0()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
17 chips, analog to digital (and d-to-a) converters, and more.
18 MMC and SD cards can be accessed using SPI protocol; and for
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H A Dspi-slave-time.c2 * SPI slave handler reporting uptime at reception of previous SPI message
4 * This SPI slave handler sends the time of reception of the last SPI message
5 * as two 32-bit unsigned integers in binary format and in network byte order,
9 * Copyright (C) 2016-2017 Glider bvba
15 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
18 * # spidev_test -D /dev/spidev2.0 -p dummy-8B
19 * spi mode: 0x0
30 #include <linux/spi/spi.h>
34 struct spi_device *spi; member
48 ret = priv->msg.status; in spi_slave_time_complete()
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H A Dspi-slave-system-control.c2 * SPI slave handler controlling system state
4 * This SPI slave handler allows remote control of system reboot, power off,
7 * Copyright (C) 2016-2017 Glider bvba
13 * Usage (assuming /dev/spidev2.0 corresponds to the SPI master on the remote
20 * # spidev_test -D /dev/spidev2.0 -p $suspend # or $reboot, $poweroff, $halt
27 #include <linux/spi/spi.h>
30 * The numbers are chosen to display something human-readable on two 7-segment
39 struct spi_device *spi; member
55 if (priv->msg.status) in spi_slave_system_control_complete()
58 cmd = be16_to_cpu(priv->cmd); in spi_slave_system_control_complete()
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/openbmc/linux/drivers/base/regmap/
H A Dregmap-spi-avmm.c1 // SPDX-License-Identifier: GPL-2.0
3 // Register map access API - SPI AVMM support
5 // Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
9 #include <linux/spi/spi.h>
13 * This driver implements the regmap operations for a generic SPI
14 * master to access the registers of the spi slave chip which has an
17 * The "SPI slave to Avalon Master Bridge" (spi-avmm) IP should be integrated
18 * in the spi slave chip. The IP acts as a bridge to convert encoded streams of
20 * order to issue register access requests to the slave chip, the host should
28 * Chapter "SPI Slave/JTAG to Avalon Master Bridge Cores" is a general
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/openbmc/u-boot/cmd/
H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0+
8 * SPI Read/Write Utilities
15 #include <spi.h>
17 /*-----------------------------------------------------------------------
37 struct spi_slave *slave; in do_spi_xfer() local
47 return -ENOMEM; in do_spi_xfer()
49 str, &dev, &slave); in do_spi_xfer()
53 slave = spi_setup_slave(bus, cs, 1000000, mode); in do_spi_xfer()
54 if (!slave) { in do_spi_xfer()
56 return -EINVAL; in do_spi_xfer()
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/openbmc/u-boot/drivers/misc/
H A Dcros_ec_spi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Chromium OS cros_ec driver - SPI interface
19 #include <spi.h>
24 struct spi_slave *slave = dev_get_parent_priv(dev->dev); in cros_ec_spi_packet() local
30 if (spi_claim_bus(slave)) { in cros_ec_spi_packet()
31 debug("%s: Cannot claim SPI bus\n", __func__); in cros_ec_spi_packet()
32 return -1; in cros_ec_spi_packet()
35 rv = spi_xfer(slave, out_bytes * 8, dev->dout, NULL, SPI_XFER_BEGIN); in cros_ec_spi_packet()
40 rv = spi_xfer(slave, 8, NULL, &byte, 0); in cros_ec_spi_packet()
46 rv = -ETIMEDOUT; in cros_ec_spi_packet()
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