1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
204a9e118SBen Warren /*
304a9e118SBen Warren * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
4a47a12beSStefan Roese * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
504a9e118SBen Warren */
604a9e118SBen Warren
704a9e118SBen Warren #include <common.h>
88931ab17SBen Warren
9d255bb0eSHaavard Skinnemoen #include <malloc.h>
1004a9e118SBen Warren #include <spi.h>
1104a9e118SBen Warren #include <asm/mpc8xxx_spi.h>
1204a9e118SBen Warren
132956acd5SKim Phillips #define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
142956acd5SKim Phillips #define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
1504a9e118SBen Warren
162956acd5SKim Phillips #define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
172956acd5SKim Phillips #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
182956acd5SKim Phillips #define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
192956acd5SKim Phillips #define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
2004a9e118SBen Warren
2104a9e118SBen Warren #define SPI_TIMEOUT 1000
2204a9e118SBen Warren
spi_setup_slave(unsigned int bus,unsigned int cs,unsigned int max_hz,unsigned int mode)23d255bb0eSHaavard Skinnemoen struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
24d255bb0eSHaavard Skinnemoen unsigned int max_hz, unsigned int mode)
25d255bb0eSHaavard Skinnemoen {
26d255bb0eSHaavard Skinnemoen struct spi_slave *slave;
27d255bb0eSHaavard Skinnemoen
28d255bb0eSHaavard Skinnemoen if (!spi_cs_is_valid(bus, cs))
29d255bb0eSHaavard Skinnemoen return NULL;
30d255bb0eSHaavard Skinnemoen
31d3504feeSSimon Glass slave = spi_alloc_slave_base(bus, cs);
32d255bb0eSHaavard Skinnemoen if (!slave)
33d255bb0eSHaavard Skinnemoen return NULL;
34d255bb0eSHaavard Skinnemoen
35d255bb0eSHaavard Skinnemoen /*
36d255bb0eSHaavard Skinnemoen * TODO: Some of the code in spi_init() should probably move
37d255bb0eSHaavard Skinnemoen * here, or into spi_claim_bus() below.
38d255bb0eSHaavard Skinnemoen */
39d255bb0eSHaavard Skinnemoen
40d255bb0eSHaavard Skinnemoen return slave;
41d255bb0eSHaavard Skinnemoen }
42d255bb0eSHaavard Skinnemoen
spi_free_slave(struct spi_slave * slave)43d255bb0eSHaavard Skinnemoen void spi_free_slave(struct spi_slave *slave)
44d255bb0eSHaavard Skinnemoen {
45d255bb0eSHaavard Skinnemoen free(slave);
46d255bb0eSHaavard Skinnemoen }
47d255bb0eSHaavard Skinnemoen
spi_init(void)4804a9e118SBen Warren void spi_init(void)
4904a9e118SBen Warren {
506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
5104a9e118SBen Warren
522956acd5SKim Phillips /*
5304a9e118SBen Warren * SPI pins on the MPC83xx are not muxed, so all we do is initialize
5404a9e118SBen Warren * some registers
552956acd5SKim Phillips */
5604a9e118SBen Warren spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
57a048d4bbSJagan Teki spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); /* Use SYSCLK / 8
582956acd5SKim Phillips (16.67MHz typ.) */
5904a9e118SBen Warren spi->event = 0xffffffff; /* Clear all SPI events */
6004a9e118SBen Warren spi->mask = 0x00000000; /* Mask all SPI interrupts */
6104a9e118SBen Warren spi->com = 0; /* LST bit doesn't do anything, so disregard */
6204a9e118SBen Warren }
6304a9e118SBen Warren
spi_claim_bus(struct spi_slave * slave)64d255bb0eSHaavard Skinnemoen int spi_claim_bus(struct spi_slave *slave)
65d255bb0eSHaavard Skinnemoen {
66d255bb0eSHaavard Skinnemoen return 0;
67d255bb0eSHaavard Skinnemoen }
68d255bb0eSHaavard Skinnemoen
spi_release_bus(struct spi_slave * slave)69d255bb0eSHaavard Skinnemoen void spi_release_bus(struct spi_slave *slave)
70d255bb0eSHaavard Skinnemoen {
71d255bb0eSHaavard Skinnemoen
72d255bb0eSHaavard Skinnemoen }
73d255bb0eSHaavard Skinnemoen
spi_xfer(struct spi_slave * slave,unsigned int bitlen,const void * dout,void * din,unsigned long flags)74d255bb0eSHaavard Skinnemoen int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
75d255bb0eSHaavard Skinnemoen void *din, unsigned long flags)
7604a9e118SBen Warren {
776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
7804a9e118SBen Warren unsigned int tmpdout, tmpdin, event;
79583fe6c3SAxel Lin int numBlks = DIV_ROUND_UP(bitlen, 32);
8004a9e118SBen Warren int tm, isRead = 0;
8104a9e118SBen Warren unsigned char charSize = 32;
8204a9e118SBen Warren
83d255bb0eSHaavard Skinnemoen debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
84d255bb0eSHaavard Skinnemoen slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
8504a9e118SBen Warren
86d255bb0eSHaavard Skinnemoen if (flags & SPI_XFER_BEGIN)
87d255bb0eSHaavard Skinnemoen spi_cs_activate(slave);
8804a9e118SBen Warren
8904a9e118SBen Warren spi->event = 0xffffffff; /* Clear all SPI events */
9004a9e118SBen Warren
9104a9e118SBen Warren /* handle data in 32-bit chunks */
9204a9e118SBen Warren while (numBlks--) {
9304a9e118SBen Warren tmpdout = 0;
9404a9e118SBen Warren charSize = (bitlen >= 32 ? 32 : bitlen);
9504a9e118SBen Warren
9604a9e118SBen Warren /* Shift data so it's msb-justified */
9704a9e118SBen Warren tmpdout = *(u32 *) dout >> (32 - charSize);
9804a9e118SBen Warren
9904a9e118SBen Warren /* The LEN field of the SPMODE register is set as follows:
10004a9e118SBen Warren *
10104a9e118SBen Warren * Bit length setting
1022956acd5SKim Phillips * len <= 4 3
1032956acd5SKim Phillips * 4 < len <= 16 len - 1
1042956acd5SKim Phillips * len > 16 0
10504a9e118SBen Warren */
10604a9e118SBen Warren
107f138ca13SIra W. Snyder spi->mode &= ~SPI_MODE_EN;
108f138ca13SIra W. Snyder
1092956acd5SKim Phillips if (bitlen <= 16) {
1102956acd5SKim Phillips if (bitlen <= 4)
1112956acd5SKim Phillips spi->mode = (spi->mode & 0xff0fffff) |
1122956acd5SKim Phillips (3 << 20);
1132956acd5SKim Phillips else
1142956acd5SKim Phillips spi->mode = (spi->mode & 0xff0fffff) |
1152956acd5SKim Phillips ((bitlen - 1) << 20);
1162956acd5SKim Phillips } else {
1172956acd5SKim Phillips spi->mode = (spi->mode & 0xff0fffff);
11804a9e118SBen Warren /* Set up the next iteration if sending > 32 bits */
11904a9e118SBen Warren bitlen -= 32;
12004a9e118SBen Warren dout += 4;
12104a9e118SBen Warren }
12204a9e118SBen Warren
123f138ca13SIra W. Snyder spi->mode |= SPI_MODE_EN;
124f138ca13SIra W. Snyder
12504a9e118SBen Warren spi->tx = tmpdout; /* Write the data out */
12604a9e118SBen Warren debug("*** spi_xfer: ... %08x written\n", tmpdout);
12704a9e118SBen Warren
1282956acd5SKim Phillips /*
12904a9e118SBen Warren * Wait for SPI transmit to get out
13004a9e118SBen Warren * or time out (1 second = 1000 ms)
13104a9e118SBen Warren * The NE event must be read and cleared first
1322956acd5SKim Phillips */
13304a9e118SBen Warren for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
13404a9e118SBen Warren event = spi->event;
13504a9e118SBen Warren if (event & SPI_EV_NE) {
13604a9e118SBen Warren tmpdin = spi->rx;
13704a9e118SBen Warren spi->event |= SPI_EV_NE;
13804a9e118SBen Warren isRead = 1;
13904a9e118SBen Warren
14004a9e118SBen Warren *(u32 *) din = (tmpdin << (32 - charSize));
14104a9e118SBen Warren if (charSize == 32) {
14204a9e118SBen Warren /* Advance output buffer by 32 bits */
14304a9e118SBen Warren din += 4;
14404a9e118SBen Warren }
14504a9e118SBen Warren }
1462956acd5SKim Phillips /*
1472956acd5SKim Phillips * Only bail when we've had both NE and NF events.
14804a9e118SBen Warren * This will cause timeouts on RO devices, so maybe
14904a9e118SBen Warren * in the future put an arbitrary delay after writing
1502956acd5SKim Phillips * the device. Arbitrary delays suck, though...
1512956acd5SKim Phillips */
15204a9e118SBen Warren if (isRead && (event & SPI_EV_NF))
15304a9e118SBen Warren break;
15404a9e118SBen Warren }
15504a9e118SBen Warren if (tm >= SPI_TIMEOUT)
15604a9e118SBen Warren puts("*** spi_xfer: Time out during SPI transfer");
15704a9e118SBen Warren
15804a9e118SBen Warren debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
15904a9e118SBen Warren }
16004a9e118SBen Warren
161d255bb0eSHaavard Skinnemoen if (flags & SPI_XFER_END)
162d255bb0eSHaavard Skinnemoen spi_cs_deactivate(slave);
1632956acd5SKim Phillips
16404a9e118SBen Warren return 0;
16504a9e118SBen Warren }
166