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Searched full:sim2 (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dsoc.c73 * SIM2(sim2/emvsim2)
/openbmc/u-boot/drivers/serial/
H A Dmcfuart.c33 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ in mcf_serial_init_common()
/openbmc/u-boot/board/astro/mcf5373l/
H A Dmcf5373l.c109 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ in rs_serial_init()
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmediatek,mt6357-regulator.yaml58 "^ldo-v(xo22|emc|mc|sim1|sim2|sram-others|sram-proc|dram|usb33)$":
/openbmc/linux/tools/testing/selftests/bpf/
H A Dtest_offload.py1084 sim2, = simdev2.nsims variable
1085 sim2.set_xdp(obj, "offload")
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6ul.c470 hws[IMX6UL_CLK_SIM2] = imx_clk_hw_gate2("sim2", "sim_sel", base + 0x80, 8); in imx6ul_clocks_init()