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/openbmc/linux/Documentation/admin-guide/gpio/
H A Dgpio-sim.rst6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO
14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For
21 **Group:** ``/config/gpio-sim``
23 This is the top directory of the gpio-sim configfs tree.
25 **Group:** ``/config/gpio-sim/gpio-device``
27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name``
29 **Attribute:** ``/config/gpio-sim/gpio-device/live``
33 name (e.g. ``'gpio-sim.0'``). The ``'live'`` attribute allows to trigger the
38 **Group:** ``/config/gpio-sim/gpio-device/gpio-bankX``
40 **Attribute:** ``/config/gpio-sim/gpio-device/gpio-bankX/chip_name``
[all …]
/openbmc/linux/tools/testing/selftests/bpf/
H A Dtest_offload.py640 fail(dev["ifname"] != sim["ifname"],
641 "Ifname incorrect %s vs %s" % (dev["ifname"], sim["ifname"]))
680 def test_spurios_extack(sim, obj, skip_hw, needle): argument
681 res = sim.cls_bpf_add_filter(obj, prio=1, handle=1, skip_hw=skip_hw,
684 res = sim.cls_bpf_add_filter(obj, op="replace", prio=1, handle=1,
687 res = sim.cls_filter_op(op="delete", prio=1, handle=1, cls="bpf",
691 def test_multi_prog(simdev, sim, obj, modename, modeid): argument
694 sim.set_xdp(obj, "offload")
695 xdp = sim.ip_link_show(xdp=True)["xdp"]
696 offloaded = sim.dfs_read("bpf_offloaded_id")
[all …]
/openbmc/linux/arch/arm/mach-imx/
H A Dmach-imx7ulp.c22 struct regmap *sim; in imx7ulp_set_revision() local
25 sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim"); in imx7ulp_set_revision()
26 if (IS_ERR(sim)) { in imx7ulp_set_revision()
27 pr_warn("failed to find fsl,imx7ulp-sim regmap!\n"); in imx7ulp_set_revision()
31 if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) { in imx7ulp_set_revision()
32 pr_warn("failed to read sim regmap!\n"); in imx7ulp_set_revision()
/openbmc/linux/Documentation/devicetree/bindings/arm/freescale/
H A Dfsl,imx7ulp-sim.yaml4 $id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml#
13 The system integration module (SIM) provides system control and chip configuration
21 - const: fsl,imx7ulp-sim
35 sim@410a3000 {
36 compatible = "fsl,imx7ulp-sim", "syscon";
/openbmc/linux/arch/powerpc/boot/dts/
H A Diss4xx.dts34 model = "PowerPC,4xx"; // real CPU changed in sim
38 i-cache-line-size = <32>; // may need fixup in sim
39 d-cache-line-size = <32>; // may need fixup in sim
40 i-cache-size = <32768>; /* may need fixup in sim */
41 d-cache-size = <32768>; /* may need fixup in sim */
109 compatible = "ibm,iss-sim-block-device";
H A Diss4xx-mpic.dts36 model = "PowerPC,4xx"; // real CPU changed in sim
50 model = "PowerPC,4xx"; // real CPU changed in sim
66 model = "PowerPC,4xx"; // real CPU changed in sim
82 model = "PowerPC,4xx"; // real CPU changed in sim
148 compatible = "ibm,iss-sim-block-device";
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8916-thwc-ufi001c.dts42 /* This selects the external SIM card slot by default */
44 sim_ctrl_default: sim-ctrl-default-state {
52 sim-en-pins {
59 sim-sel-pins {
/openbmc/qemu/tests/tcg/mips/user/isa/r5900/
H A DMakefile5 SIM=qemu-mipsel macro
27 echo $(SIM) $(SIM_FLAGS) ./$$case;\
28 $(SIM) $(SIM_FLAGS) ./$$case; \
/openbmc/linux/drivers/pci/pcie/
H A Daer_inject.c220 u32 *sim; in aer_inj_read_config() local
236 sim = find_pci_config_dword(err, where, NULL); in aer_inj_read_config()
237 if (sim) { in aer_inj_read_config()
238 *val = *sim; in aer_inj_read_config()
251 u32 *sim; in aer_inj_write_config() local
268 sim = find_pci_config_dword(err, where, &rw1cs); in aer_inj_write_config()
269 if (sim) { in aer_inj_write_config()
271 *sim ^= val; in aer_inj_write_config()
273 *sim = val; in aer_inj_write_config()
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dcpu_init.c106 sim_t *sim = (sim_t *)(MMAP_SIM); in cpu_init_f() local
108 out_8(&sim->sypcr, 0x00); in cpu_init_f()
109 out_8(&sim->swivr, 0x0f); in cpu_init_f()
110 out_8(&sim->swsr, 0x00); in cpu_init_f()
111 out_8(&sim->mpark, 0x00); in cpu_init_f()
H A Dcpu.c14 sim_t *sim = (sim_t *)(MMAP_SIM); in do_reset() local
17 out_8(&sim->sypcr, SYPCR_SWE | SYPCR_SWRI); in do_reset()
/openbmc/openpower-hw-diags/test/
H A Dtest-pdbg-dts.cpp5 #include <test/sim-hw-access.hpp>
178 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
212 sim::CfamAccess& cfam = sim::CfamAccess::getSingleton(); in TEST()
259 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
H A Dtest-tod-step-check-fault.cpp5 #include <test/sim-hw-access.hpp>
26 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
/openbmc/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7720.c224 WDT, REF_RCMI, SIM, enumerator
241 INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500),
242 INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540),
268 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
/openbmc/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun50i-h5.c64 SUNXI_FUNCTION(0x2, "sim"), /* PWREN */
69 SUNXI_FUNCTION(0x2, "sim"), /* CLK */
74 SUNXI_FUNCTION(0x2, "sim"), /* DATA */
79 SUNXI_FUNCTION(0x2, "sim"), /* RST */
84 SUNXI_FUNCTION(0x2, "sim"), /* DET */
143 SUNXI_FUNCTION(0x3, "sim"), /* VPPEN */
149 SUNXI_FUNCTION(0x3, "sim"), /* VPPPP */
309 SUNXI_FUNCTION(0x4, "sim")), /* PWREN */
314 SUNXI_FUNCTION(0x4, "sim")), /* CLK */
319 SUNXI_FUNCTION(0x4, "sim")), /* DATA */
[all …]
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/
H A Dgcc-testsuite.inc39 content.append('load_generic_config "sim"')
40 content.append('load_base_board_description "basic-sim"')
69 content.append('set_board_info sim "{0}"'.format(qemu_binary))
70 content.append('set_board_info sim,options "{0}"'.format(" ".join(args)))
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dbsc9132qds.c303 if (hwconfig("sim")) { in misc_init_r()
410 if (hwconfig("sim")) { in ft_board_setup()
419 /* remove dts sim node */ in ft_board_setup()
420 fdt_del_node_compat(blob, "fsl,sim-v1.0"); in ft_board_setup()
421 printf("SIM & SDHC can't work together on the board"); in ft_board_setup()
422 printf("\nRemove sim from hwconfig and reset\n"); in ft_board_setup()
/openbmc/linux/drivers/iio/common/st_sensors/
H A Dst_sensors_spi.c63 if (settings->sim.addr) { in st_sensors_configure_spi_3_wire()
65 settings->sim.addr, in st_sensors_configure_spi_3_wire()
66 settings->sim.value in st_sensors_configure_spi_3_wire()
/openbmc/qemu/docs/system/
H A Dtarget-xtensa.rst10 - Xtensa emulator pseudo board \"sim\"
14 The sim pseudo board emulation provides an environment similar to one
/openbmc/qemu/tests/functional/
H A Dtest_or1k_replay.py3 # Replay test that boots a Linux kernel on an OpenRISC-1000 SIM machine
19 self.set_machine('or1k-sim')
H A Dtest_or1k_sim.py3 # Functional test that boots a Linux kernel on an OpenRISC-1000 SIM machine
18 self.set_machine('or1k-sim')
/openbmc/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7763.c244 USBH, USBF, TPU, PCC, MMCIF, SIM, enumerator
284 INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
285 INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
310 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,
328 { 0xffd400a8, 0, 32, 8, /* INT2PRI10 */ { TPU, SIM, SIOF2, SIOF1 } },
/openbmc/qemu/docs/system/openrisc/
H A Dor1k-sim.rst22 $ qemu-system-or1k -cpu or1220 -M or1k-sim -nographic \
37 The ``or1k-sim`` board automatically generates a device tree blob ("dtb")
/openbmc/linux/arch/sh/kernel/cpu/sh4/
H A Dsetup-sh7760.c40 DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF, enumerator
83 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
112 SCIF1, SCIF2, SIM, HSPI } },
202 * This is actually a SIM card module serial port, based on an SCI with
203 * additional registers. The sh-sci driver doesn't support the SIM port
/openbmc/linux/tools/testing/selftests/gpio/
H A Dgpio-sim.sh6 CONFIGFS_DIR="/sys/kernel/config/gpio-sim"
7 MODULE="gpio-sim"
161 # Load the gpio-sim module. This will pull in configfs if needed too.
162 modprobe gpio-sim || skip "unable to load the gpio-sim module"

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