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/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds.c341 printf("SERDES1 is not enabled\n"); in configure_vsc3316_3308()
345 debug("Using SERDES1 Protocol: 0x%x:\n", serdes1_prtcl); in configure_vsc3316_3308()
490 " SerDes1 Protocol.\n", serdes1_prtcl); in configure_vsc3316_3308()
756 printf("SerDes1, PLL:%d didnt lock\n", i); in check_serdes_pll_locks()
785 printf("SERDES1 is not enabled\n"); in config_serdes1_refclks()
789 debug("Using SERDES1 Protocol: 0x%x:\n", serdes1_prtcl); in config_serdes1_refclks()
798 * For this SerDes1's Refclk1 and refclk2 need to be set in config_serdes1_refclks()
846 /* Change SerDes1's Refclk1 to 125MHz for on board in config_serdes1_refclks()
891 " supported for:%x SerDes1 Protocol.\n", in config_serdes1_refclks()
1031 /* SerDes1 refclks need to be set again, as default clks in board_early_init_r()
[all …]
H A Deth_b4860qds.c162 printf("SERDES1 is not enabled\n"); in board_eth_init()
166 debug("Using SERDES1 Protocol: 0x%x:\n", serdes1_prtcl); in board_eth_init()
231 printf("Fman: Unsupported SerDes1 Protocol 0x%02x\n", in board_eth_init()
/openbmc/u-boot/board/freescale/ls1088a/
H A Deth_ls1088aqds.c424 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
433 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
441 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
449 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
458 printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
507 printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", in ls1088a_handle_phy_interface_sgmii()
H A Deth_ls1088ardb.c72 printf("SerDes1 protocol 0x%x is not supported on LS1088ARDB\n", in board_eth_init()
/openbmc/u-boot/drivers/net/fm/
H A Dt4240.c137 /* check lane G on SerDes1 */ in fman_port_enet_if()
145 /* check lane C on SerDes1 */ in fman_port_enet_if()
H A Dt1024.c78 /* check lane A on SerDes1 */ in fman_port_enet_if()
/openbmc/u-boot/board/freescale/ls2080aqds/
H A Deth.c457 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
477 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
497 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
519 printf("qds: WRIOP: Supported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
523 printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", in initialize_dpmac_to_slot()
671 printf("%s qds: WRIOP: Unsupported SerDes1 Protocol 0x%02x\n", in ls2080a_handle_phy_interface_sgmii()
/openbmc/u-boot/board/freescale/lx2160a/
H A Deth_lx2160aqds.c66 * e.g. for serdes1 protocol 19 it is being assumed that X-M11-USXGMII
71 * used in serdes1 protocol 19 (could have selected MDIO 2)
516 /*Look for phy config for serdes1 in phy config table*/ in board_eth_init()
520 printf("%s WRIOP: Unsupported SerDes1 Protocol %d\n", in board_eth_init()
H A Deth_lx2160ardb.c115 printf("SerDes1 protocol 0x%x is not supported on LX2160ARDB\n", in board_eth_init()
H A DREADME20 Serdes1: Supports two USXGMII connectors, each connected through
86 SERDES1 |CARDS
H A Dlx2160a.c255 puts("SERDES1 Reference : "); in checkboard()
276 puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz\n"); in checkboard()
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-am654-serdes.yaml91 <&serdes1 AM654_SERDES_LO_REFCLK>;
/openbmc/u-boot/board/freescale/t208xrdb/
H A Deth_t208xrdb.c68 printf("SerDes1 protocol 0x%x is not supported on T208xRDB\n", in board_eth_init()
/openbmc/u-boot/board/freescale/ls2080ardb/
H A Deth_ls2080rdb.c71 printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n", in board_eth_init()
H A Dls2080ardb.c104 puts("SERDES1 Reference : "); in checkboard()
125 puts("SERDES1 Reference : "); in checkboard()
/openbmc/u-boot/board/freescale/ls1046ardb/
H A DREADME16 - SERDES1 Connections, 4 lanes supporting:
/openbmc/u-boot/doc/
H A DREADME.b4860qds307 0x2a, 0x8d (serdes1, serdes2) [DEFAULT]
308 0x2a, 0xb2 (serdes1, serdes2)
323 0x18, 0x9e (serdes1, serdes2)
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dti,j721e-system-controller.yaml96 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
/openbmc/u-boot/board/freescale/t102xqds/
H A Deth_t102xqds.c53 /* Map SerDes1 4 lanes to default slot, will be initialized dynamically */
231 * This function reads RCW to check if Serdes1{A:D} is configured
/openbmc/u-boot/board/freescale/t4rdb/
H A Deth.c76 puts("Invalid SerDes1 protocol for T4240RDB\n"); in board_eth_init()
H A Dt4240rdb.c44 printf(" SERDES1=100MHz SERDES2=156.25MHz\n" in checkboard()
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am6548-iot2050-advanced-m2.dts98 phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
/openbmc/u-boot/board/freescale/t208xqds/
H A Dt208xqds.c109 /* SerDes1 is not enabled */ in brd_mux_lane_to_slot()
265 printf("WARNING: unsupported for SerDes1 Protocol %d\n", in brd_mux_lane_to_slot()
/openbmc/linux/include/linux/fsl/
H A Dguts.h123 u32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */
124 u32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fman-dtsec.yaml169 phys = <&serdes1 1>;

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