| /openbmc/linux/Documentation/networking/devlink/ |
| H A D | mlx5.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 .. list-table:: Generic parameters implemented
15 * - Name
16 - Mode
17 - Validation
18 * - ``enable_roce``
19 - driverinit
20 - Type: Boolean
26 * - ``io_eq_size``
27 - driverinit
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/huawei/ |
| H A D | hinic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
14 Some HiNIC devices support SR-IOV. This driver is used for Physical Function
17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
28 19e5:1822 - HiNIC PF
34 hinic_dev - Implement a Logical Network device that is independent from
37 hinic_hwdev - Implement the HW details of the device and include the components
55 Asynchronous Event Queues(AEQs) - The event queues for receiving messages from
58 Application Programmable Interface commands(API CMD) - Interface for sending
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
23 - snps,dwmac
24 - snps,dwmac-3.40a
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| H A D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
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| H A D | intel,ixp4xx-hss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
14 The Intel IXP4xx HSS makes use of the IXP4xx NPE (Network
15 Processing Engine) and the IXP4xx Queue Manager to process
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/ |
| H A D | dpaa.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/google/ |
| H A D | gve.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
9 The GVE driver binds to a single PCI device id used by the virtual
12 +--------------+----------+---------+
16 +--------------+----------+---------+
18 +--------------+----------+---------+
19 |Sub-vendor ID | `0x1AE0` | Google |
20 +--------------+----------+---------+
21 |Sub-device ID | `0x0058` | |
22 +--------------+----------+---------+
24 +--------------+----------+---------+
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/ |
| H A D | i40e.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
25 For questions related to hardware requirements, refer to the documentation
26 supplied with your Intel adapter. All hardware requirements listed apply to use
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| H A D | ice.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
24 For questions related to hardware requirements, refer to the documentation
25 supplied with your Intel adapter. All hardware requirements listed apply to use
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
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| /openbmc/linux/drivers/net/wireless/ralink/rt2x00/ |
| H A D | rt2x00queue.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
21 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
23 * 2432 makes sense since it is big enough to contain the maximum fragment
24 * size according to the ieee802.11 specs.
41 * @QID_RX: RX queue
42 * @QID_OTHER: None of the above (don't use, only present for completeness)
43 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
44 * @QID_ATIM: Atim queue (value unspecified, don't send it to device)
62 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
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| /openbmc/linux/drivers/staging/qlge/ |
| H A D | TODO | 1 * commit 7c734359d350 ("qlge: Size RX buffers based on MTU.", v2.6.33-rc1)
4 ql_build_rx_skb(). That function is now used exclusively to handle packets
5 that underwent header splitting but it still contains code to handle non
7 * truesize accounting is incorrect (ex: a 9000B frame has skb->truesize 10280
8 while containing two frags of order-1 allocations, ie. >16K)
9 * while in that area, using two 8k buffers to store one 9k frame is a poor
13 * rename "rx" queues to "completion" queues. Calling tx completion queues "rx
14 queues" is confusing.
15 * struct rx_ring is used for rx and tx completions, with some members relevant
16 to one case only
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| /openbmc/linux/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_lib.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * ixgbe_cache_ring_dcb_sriov - Descriptor ring to register mapping for SR-IOV
10 * @adapter: board private structure to initialize
12 * Cache the descriptor ring offsets for SR-IOV to the assigned rings. It
13 * will also try to cache the proper offsets if RSS/FCoE are enabled along
20 struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; in ixgbe_cache_ring_dcb_sriov()
22 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; in ixgbe_cache_ring_dcb_sriov()
25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov()
32 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) in ixgbe_cache_ring_dcb_sriov()
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| /openbmc/linux/drivers/net/ethernet/sfc/siena/ |
| H A D | net_driver.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
61 /* Checksum generation is a per-queue option in hardware, so each
62 * queue visible to the networking core is backed by two hardware TX
63 * queues. */
68 #define EFX_TXQ_TYPE_HIGHPRI 4 /* High-priority (for TC) */
70 /* HIGHPRI is Siena-only, and INNER_CSUM is EF10, so no need for both */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
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| /openbmc/linux/Documentation/networking/ |
| H A D | napi.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
14 The host then schedules a NAPI instance to process the events.
19 but there is an option to use :ref:`separate kernel threads<threaded>`
23 of event (packet Rx and Tx) processing.
30 of the NAPI instance while the method is the driver-specific event
37 -----------
40 from the system. The instances are attached to the netdevice passed
46 to not be invoked. napi_disable() waits for ownership of the NAPI
47 instance to be released.
50 concurrent use of datapath APIs but an incorrect sequence of control API
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| /openbmc/linux/drivers/net/ |
| H A D | xen-netfront.c | 4 * Copyright (c) 2002-2005, K A Fraser
11 * software packages, subject to the following license:
13 * Permission is hereby granted, free of charge, to any person obtaining a copy
14 * of this source file (the "Software"), to deal in the Software without
15 * restriction, including without limitation the rights to use, copy, modify,
17 * and to permit persons to whom the Software is furnished to do so, subject to
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
67 "Maximum number of queues per virtual interface");
81 #define NETFRONT_SKB_CB(skb) ((struct netfront_cb *)((skb)->cb))
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| /openbmc/linux/drivers/net/ethernet/sfc/ |
| H A D | net_driver.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
65 * queues. */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sa8540p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
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| /openbmc/linux/include/xen/interface/io/ |
| H A D | netif.h | 1 /* SPDX-License-Identifier: MIT */
5 * Unified network-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
19 * ring slots a skb can use. Netfront / netback may not work as
22 * A better approach is to add mechanism for netfront / netback to
24 * frontends, so we need to define a value which states the minimum
28 * (18), which is proved to work with most frontends. Any new backend
29 * which doesn't negotiate with frontend should expect frontend to
30 * send a valid packet using slots up to this value.
37 * If the client sends notification for rx requests then it should specify
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| /openbmc/qemu/tests/qtest/fuzz/ |
| H A D | virtio_net_fuzz.c | 2 * virtio-net Fuzzing Target
10 * See the COPYING file in the top-level directory.
15 #include "standard-headers/linux/virtio_config.h"
17 #include "tests/qtest/libqos/virtio-net.h"
38 uint8_t rx; in virtio_net_fuzz_multi() member
46 QVirtioDevice *dev = net_if->vdev; in virtio_net_fuzz_multi()
52 Size -= sizeof(vqa); in virtio_net_fuzz_multi()
54 q = net_if->queues[vqa.queue % 3]; in virtio_net_fuzz_multi()
59 * Only attempt to write incoming packets, when using the socket in virtio_net_fuzz_multi()
62 if (vqa.rx && sockfds_initialized) { in virtio_net_fuzz_multi()
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| /openbmc/linux/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-main.c | 4 * This file is available to you under your choice of the following two
9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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| /openbmc/linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/dma-mapping.h>
110 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
120 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
136 * use it to convert user specified BW limit into Kbps
142 * filters need new recipe to be created for specified extraction sequence
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| /openbmc/linux/drivers/net/ethernet/freescale/dpaa/ |
| H A D | dpaa_eth.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
3 * Copyright 2008 - 2016 Freescale Semiconductor Inc.
21 /* Number of Tx queues per traffic class */
23 /* Total number of Tx queues */
26 /* More detailed FQ types - used for fine-grained WQ assignments */
28 FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
29 FQ_TYPE_RX_ERROR, /* Rx Error FQs */
30 FQ_TYPE_RX_PCD, /* Rx Parse Classify Distribute FQs */
32 FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */
34 FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */
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| /openbmc/linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | net_driver.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
65 * queues. */
79 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
82 #define EF4_RX_USR_BUF_SIZE (2048 - 256)
85 * of every buffer. Otherwise, we just need to ensure 4-byte
97 * struct ef4_buffer - A general-purpose DMA buffer
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| /openbmc/qemu/qapi/ |
| H A D | net.json | 1 # -*- Mode: Python -*-
18 # @up: true to set the link status to be up
21 # - If @name is not a valid network device, DeviceNotFound
29 # .. qmp-example::
31 # -> { "execute": "set_link",
33 # <- { "return": {} }
47 # - If @type is not a valid network backend, DeviceNotFound
49 # .. qmp-example::
51 # -> { "execute": "netdev_add",
54 # <- { "return": {} }
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| /openbmc/linux/drivers/crypto/caam/ |
| H A D | dpseci.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
4 * Copyright 2017-2018 NXP
21 * Maximum number of Tx/Rx queues per DPSECI object
26 * All queues considered; see dpseci_set_rx_queue()
28 #define DPSECI_ALL_QUEUES (u8)(-1)
41 * struct dpseci_cfg - Structure representing DPSECI configuration
44 * @num_tx_queues: num of queues towards the SEC
45 * @num_rx_queues: num of queues back from the SEC
49 * valid priorities are configured with values 1-8;
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