/openbmc/linux/Documentation/devicetree/bindings/thermal/ |
H A D | rockchip-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Temperature Sensor ADC (TSADC) on Rockchip SoCs 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-tsadc 16 - rockchip,rk3228-tsadc 17 - rockchip,rk3288-tsadc 18 - rockchip,rk3328-tsadc [all …]
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/openbmc/u-boot/doc/device-tree-bindings/thermal/ |
H A D | rockchip-thermal.txt | 1 * Temperature Sensor ADC (TSADC) on rockchip SoCs 4 - compatible : "rockchip,rk3288-tsadc" 5 - reg : physical base address of the controller and length of memory mapped 7 - interrupts : The interrupt number to the cpu. The interrupt specifier format 9 - clocks : Must contain an entry for each entry in clock-names. 10 - clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for 12 - resets : Must contain an entry for each entry in reset-names. 14 - reset-names : Must include the name "tsadc-apb". 15 - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. 16 - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk322x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/clock/rk3228-cru.h> 11 #include <dt-bindings/thermal/thermal.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3368.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/rk3368-cru.h> 44 #include <dt-bindings/gpio/gpio.h> 45 #include <dt-bindings/interrupt-controller/irq.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/pinctrl/rockchip.h> 48 #include <dt-bindings/thermal/thermal.h> 49 #include <dt-bindings/memory/rk3368-dmc.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <2>; [all …]
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H A D | rk3288-thermal.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for RK3288 SoC thermal 8 #include <dt-bindings/thermal/thermal.h> 11 polling-delay-passive = <1000>; /* milliseconds */ 12 polling-delay = <5000>; /* milliseconds */ 15 thermal-sensors = <&tsadc 0>; 20 polling-delay-passive = <100>; /* milliseconds */ 21 polling-delay = <5000>; /* milliseconds */ 24 thermal-sensors = <&tsadc 1>; 45 cooling-maps { [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power-domain/rk3288.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/video/rk3288.h> 14 compatible = "rockchip,rk3288"; [all …]
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H A D | rk3288-phycore-som.dtsi | 2 * Device tree file for Phytec phyCORE-RK3288 SoM 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/net/ti-dp83867.h> 46 #include "rk3288.dtsi" 49 model = "Phytec RK3288 phyCORE"; 50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 67 ext_gmac: external-gmac-clock { 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <125000000>; [all …]
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H A D | rk3288-miqi.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 6 #include "rk3288.dtsi" 14 ext_gmac: external-gmac-clock { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <125000000>; 18 clock-output-names = "ext_gmac"; 21 io_domains: io-domains { 22 compatible = "rockchip,rk3288-io-voltage-domain"; 25 audio-supply = <&vcca_33>; [all …]
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H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 10 #include "rk3288.dtsi" 18 stdout-path = &uart2; 22 u-boot,dm-pre-reloc; 23 u-boot,boot0 = &spi_flash; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&fw_wp_ap>; 30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>; [all …]
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H A D | rk3399.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd. 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron-pinky.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "rk3288-veyron-chromebook.dtsi" 10 #include "../cros-ec-sbs.dtsi" 14 compatible = "google,veyron-pinky-rev2", "google,veyron-pinky", 15 "google,veyron", "rockchip,rk3288"; 17 /delete-node/backlight-regulator; 18 /delete-node/panel-regulator; 19 /delete-node/emmc-pwrseq; 20 /delete-node/vcc18-lcd; [all …]
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H A D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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H A D | rk322x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3228-cru.h> 8 #include <dt-bindings/thermal/thermal.h> 9 #include <dt-bindings/power/rk3228-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | rk3288-phycore-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device tree file for Phytec phyCORE-RK3288 SoM 8 #include <dt-bindings/net/ti-dp83867.h> 9 #include "rk3288.dtsi" 12 model = "Phytec RK3288 phyCORE"; 13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 29 ext_gmac: external-gmac-clock { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <125000000>; [all …]
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H A D | rk3288-firefly-reload-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device tree file for Firefly Rockchip RK3288 Core board 7 #include <dt-bindings/input/input.h> 8 #include "rk3288.dtsi" 16 ext_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <125000000>; 20 clock-output-names = "ext_gmac"; 24 vcc_flash: flash-regulator { [all …]
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H A D | rk3288-vyasa.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "rk3288.dtsi" 10 model = "Amarula Vyasa-RK3288"; 11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; 14 stdout-path = &uart2; 22 dc12_vbat: dc12-vbat { 23 compatible = "regulator-fixed"; 24 regulator-name = "dc12_vbat"; 25 regulator-min-microvolt = <12000000>; [all …]
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H A D | rk3288-popmetal.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com> 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include "rk3288.dtsi" 11 model = "PopMetal-RK3288"; 12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 clock-frequency = <125000000>; [all …]
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H A D | rk3288-r89.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/pwm/pwm.h> 9 #include "rk3288.dtsi" 13 compatible = "netxeon,r89", "rockchip,rk3288"; 20 ext_gmac: external-gmac-clock { 21 compatible = "fixed-clock"; 22 clock-frequency = <125000000>; 23 clock-output-names = "ext_gmac"; [all …]
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H A D | rk3288-miqi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include "rk3288.dtsi" 12 compatible = "mqmaker,miqi", "rockchip,rk3288"; 15 stdout-path = "serial2:115200n8"; 23 ext_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <125000000>; [all …]
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H A D | rk3288-rock2-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/pwm/pwm.h> 4 #include "rk3288.dtsi" 12 emmc_pwrseq: emmc-pwrseq { 13 compatible = "mmc-pwrseq-emmc"; 14 pinctrl-0 = <&emmc_reset>; 15 pinctrl-names = "default"; 16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3328-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/drivers/thermal/ |
H A D | rockchip_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd 4 * Caesar Wang <wxt@rock-chips.com> 55 * struct chip_tsadc_table - hold information about chip-specific differences 69 * struct rockchip_tsadc_chip - hold the private data of tsadc chip 71 * @chn_num: the channel number of tsadc chip 72 * @tshut_temp: the hardware-controlled shutdown temperature value 73 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO) 74 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH) 75 * @initialize: SoC special initialize tsadc controller method [all …]
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/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | rockchip-saradc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - const: rockchip,saradc 16 - const: rockchip,rk3066-tsadc 17 - const: rockchip,rk3399-saradc 18 - const: rockchip,rk3588-saradc 19 - items: [all …]
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