/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SPI Controller 10 The Rockchip SPI controller is used to interface with various devices such 11 as flash and display controllers using the SPI communication interface. 14 - $ref: spi-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rk3036-spi [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 33 compatible = "fixed-clock"; 34 clock-frequency = <24000000>; 35 #clock-cells = <0>; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3036.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3036-cru.h> 8 #include <dt-bindings/soc/rockchip,boot-mode.h> 9 #include <dt-bindings/power/rk3036-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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H A D | rk322x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3228-cru.h> 8 #include <dt-bindings/thermal/thermal.h> 9 #include <dt-bindings/power/rk3228-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 arm-pmu { [all …]
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H A D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 33 compatible = "simple-bus"; 34 #address-cells = <1>; 35 #size-cells = <1>; 38 dmac1_s: dma-controller@20018000 { 43 #dma-cells = <1>; 44 arm,pl330-broken-no-flushp; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 16 #address-cells = <1>; 17 #size-cells = <0>; 18 enable-method = "rockchip,rk3066-smp"; 22 compatible = "arm,cortex-a9"; 23 next-level-cache = <&L2>; 25 operating-points = < [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power-domain/rk3288.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/video/rk3288.h> 16 interrupt-parent = <&gic>; [all …]
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H A D | rk3399.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd. 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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H A D | rk3368.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/rk3368-cru.h> 44 #include <dt-bindings/gpio/gpio.h> 45 #include <dt-bindings/interrupt-controller/irq.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/pinctrl/rockchip.h> 48 #include <dt-bindings/thermal/thermal.h> 49 #include <dt-bindings/memory/rk3368-dmc.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <2>; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 33 #address-cells = <2>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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H A D | rk3399.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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H A D | rk3588s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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H A D | rk356x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3328-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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H A D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/px30-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/drivers/spi/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # SPI driver configuration 5 menuconfig SPI config 6 bool "SPI support" 10 protocol. Chips that support SPI can have data transfer rates 12 controller and a chipselect. Most SPI slaves don't support 13 dynamic device discovery; some are even write-only or read-only. 15 SPI is widely used by microcontrollers to talk with sensors, 17 chips, analog to digital (and d-to-a) converters, and more. 18 MMC and SD cards can be accessed using SPI protocol; and for [all …]
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H A D | spi-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Addy Ke <addy.ke@rock-chips.com> 14 #include <linux/spi/spi.h> 18 #define DRIVER_NAME "rockchip-spi" 25 /* SPI register offsets */ 154 /* sclk_out: spi host internal logic in rk3x can support 50Mhz */ 158 * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However, 163 /* 2 for native cs, 2 for cs-gpio */ 198 bool cs_inactive; /* spi target tansmition stop when cs inactive */ 199 bool cs_high_supported; /* native CS supports active-high polarity */ [all …]
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/openbmc/linux/drivers/mmc/host/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 94 implements a hardware byte swapper using a 32-bit datum. 123 disabled, it will steal the MMC cards away - rendering them 482 MOXA provides one multi-functional card reader which can 483 be found on some embedded hardware such as UC-7112-LX. 534 of Alcor Micro PCI-E card reader 628 tristate "MMC/SD/SDIO over SPI" 633 Some systems access MMC/SD/SDIO cards using a SPI controller 639 If unsure, or if your system has no SPI master driver, say N. 678 tristate "DMA for SDHI SD/SDIO controllers using SYS-DMAC" [all …]
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/openbmc/linux/ |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |