| /openbmc/linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | nvm-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulatory/NVM commands
53 * enum iwl_nvm_access_op - NVM access opcode
63 * enum iwl_nvm_access_target - target of the NVM_ACCESS_CMD
75 * enum iwl_nvm_section_type - section types for NVM_ACCESS_CMD
97 * struct iwl_nvm_access_cmd - Request the device to send an NVM section
115 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
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| H A D | scan.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 * enum iwl_scan_subcmd_ids - scan commands
29 * struct iwl_ssid_ie - directed scan network information element
72 * struct iwl_scan_offload_blocklist - SCAN_OFFLOAD_BLACKLIST_S
75 * @client_bitmap: clients ignore this entry - enum scan_framework_client
106 * struct iwl_scan_offload_profile - SCAN_OFFLOAD_PROFILE_S
108 * @unicast_cipher: encryption algorithm to match - bitmap
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| H A D | rfi.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2020-2021 Intel Corporation
13 * struct iwl_rfi_lut_entry - an entry in the RFI frequency LUT.
16 * @channels: channels that can be interfered at frequency freq (at most 15)
21 u8 channels[IWL_RFI_LUT_ENTRY_CHANNELS_NUM]; member
26 * struct iwl_rfi_config_cmd - RFI configuration table
34 u8 reserved[3]; member
38 * iwl_rfi_freq_table_status - status of the frequency table query
50 * struct iwl_rfi_freq_table_resp_cmd - get the rfi freq table used by FW
61 * struct iwl_rfi_deactivate_notif - notifcation that FW disaled RFIm
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| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | ingenic,dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - ingenic,jz4740-dma
20 - ingenic,jz4725b-dma
21 - ingenic,jz4755-dma
22 - ingenic,jz4760-dma
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| H A D | ti-edma.txt | 8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
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| H A D | dma-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
29 Bitmask of available DMA channels in ascending order that are
30 not reserved by firmware and are available to the
32 The first item in the array is for channels 0-31, the second is for
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| H A D | brcm,bcm2835-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
13 The BCM2835 DMA controller has 16 channels in total. Only the lower
14 13 channels have an associated IRQ. Some arbitrary channels are used by the
15 VideoCore firmware (1,3,6,7 in the current firmware version). The channels
19 - $ref: dma-controller.yaml#
23 const: brcm,bcm2835-dma
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| /openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | cosmic,10001-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
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| /openbmc/linux/sound/soc/sof/ |
| H A D | ipc4-topology.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
6 * Copyright(c) 2022 Intel Corporation. All rights reserved.
15 #define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
16 #define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) - 1)))
22 * LL domain - Low latency domain
23 * DP domain - Data processing domain
66 * The base of multi-gateways. Multi-gateways addressing starts from
67 * ALH_MULTI_GTW_BASE and there are ALH_MULTI_GTW_COUNT multi-sources
68 * and ALH_MULTI_GTW_COUNT multi-sinks available.
70 * ALH_MULTI_GTW_BASE + ALH_MULTI_GTW_COUNT - 1.
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| /openbmc/linux/drivers/comedi/drivers/ |
| H A D | amplc_dio200.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
24 * [0] - I/O port base address
25 * [1] - IRQ (optional, but commands won't work without it)
32 * ------------- ------------- -------------
34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
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| H A D | amplc_dio200_pci.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
8 * COMEDI - Linux Control and Measurement Device Interface
30 * ------------- ------------- -------------
32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
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| /openbmc/linux/Documentation/userspace-api/media/v4l/ |
| H A D | vidioc-g-modulator.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
39 ``index`` field and zero out the ``reserved`` array of a struct
49 initialize the ``index`` and ``txsubchans`` fields and the ``reserved``
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
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| /openbmc/linux/drivers/interconnect/qcom/ |
| H A D | icc-rpmh.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
9 #include <dt-bindings/interconnect/qcom,icc.h>
15 * struct qcom_icc_provider - Qualcomm specific interconnect provider
31 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
35 * @reserved: reserved field
41 u8 reserved; member
50 * struct qcom_icc_node - Qualcomm specific interconnect nodes
55 * @channels: num of channels at this node
67 u16 channels; member
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| /openbmc/linux/include/xen/interface/io/ |
| H A D | sndif.h | 1 /* SPDX-License-Identifier: MIT */
5 * Unified sound-device I/O interface for Xen guest OSes.
7 * Copyright (C) 2013-2015 GlobalLogic Inc.
8 * Copyright (C) 2016-2017 EPAM Systems Inc.
34 * Front->back notifications: when enqueuing a new request, sending a
36 * hold-off mechanism provided by the ring macros). Backends must set
39 * Back->front notifications: when enqueuing a new response, sending a
41 * hold-off mechanism provided by the ring macros). Frontends must set
44 * The two halves of a para-virtual sound card driver utilize nodes within
58 * Note: depending on the use-case backend can expose more sound cards and
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| /openbmc/linux/Documentation/driver-api/rapidio/ |
| H A D | tsi721.rst | 2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
10 doorbells, inbound maintenance port-writes and RapidIO messaging.
13 channels. This mechanism provides access to larger range of hop counts and
16 RapidIO messaging support uses dedicated messaging channels for each mailbox.
23 - 'dbg_level'
24 - This parameter allows to control amount of debug information
32 - 'dma_desc_per_channel'
33 - This parameter defines number of hardware buffer
37 - 'dma_txqueue_sz'
38 - DMA transactions queue size. Defines number of pending
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| /openbmc/linux/sound/soc/amd/ |
| H A D | acp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
73 /* Playback DMA channels */
77 /* Capture DMA channels */
81 /* Playback DMA Channels for I2S BT instance */
85 /* Capture DMA Channels for I2S BT Instance */
89 /* Playback DMA channels for I2S MICSP instance */
217 /* Reserved for future use */
218 u32 reserved; member
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| /openbmc/linux/drivers/edac/ |
| H A D | i3000_edac.c | 25 /* Intel 3000 register addresses - device 0 function 0 - DRAM Controller */
33 * 7:1 reserved
39 * 6:1 reserved
54 deap |= (edeap & 1) << (32 - PAGE_SHIFT); in deap_pfn()
60 return deap & ~(I3000_DEAP_GRAIN - 1) & ~PAGE_MASK; in deap_offset()
75 * 15:12 reserved
78 * 10 reserved
79 * 9 LOCK to non-DRAM Memory Flag (LCKF)
81 * 7:2 reserved
82 * 1 Multi-bit DRAM ECC Error Flag (DMERR)
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| H A D | i82975x_edac.c | 34 /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
37 * 31:7 128 byte cache-line address
38 * 6:1 reserved
49 * 1h:7h reserved
50 * More - See Page 65 of Intel DocSheet.
55 * 15:12 reserved
57 * 10 reserved
58 * 9 non-DRAM lock error (ndlock)
60 * 7:2 reserved
73 * 15:12 reserved
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_8xx.h | 10 * functional files.....but anyone else is welcome to try. -- Dan
144 char res[0x74]; /* Reserved area */
174 /* The key to unlock registers maintained by keep-alive power.
277 typedef struct scc { /* Serial communication channels */
292 typedef struct smc { /* Serial management channels */
309 ushort res1; /* reserved */
310 uint fec_hash_table_high; /* upper 32-bits of hash table */
311 uint fec_hash_table_low; /* lower 32-bits of hash table */
315 uint res2[9]; /* reserved */
322 uint res3[10]; /* reserved */
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| /openbmc/linux/include/sound/sof/ |
| H A D | channel_map.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
6 * Copyright(c) 2019 Intel Corporation. All rights reserved.
16 * \brief Channel map, specifies transformation of one-to-many or many-to-one.
18 * In case of one-to-many specifies how the output channels are computed out of
20 * in case of many-to-one specifies how a single target channel is computed
29 * Channel mask describes which channels are taken into account on the "many"
30 * side. Bit[i] set to 1 means that i-th channel is used for computation
41 uint32_t reserved; member
57 uint32_t reserved[3]; member
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| H A D | dai-intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
58 /* DMIC max. four controllers for eight microphone channels */
61 /* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
93 /* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
98 uint32_t channels; member
101 /* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
106 uint32_t channels; member
108 /* reserved for future use */
109 uint32_t reserved[13]; member
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| /openbmc/linux/Documentation/devicetree/bindings/crypto/ |
| H A D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
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| /openbmc/linux/tools/include/uapi/linux/ |
| H A D | ethtool.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
21 #define ETHTOOL_GCHANNELS 0x0000003c /* Get no of channels */
24 * struct ethtool_channels - configuring number of network channel
25 * @cmd: ETHTOOL_{G,S}CHANNELS
36 * This can be used to configure RX, TX and other channels.
56 * struct ethtool_drvinfo - general driver and device information
67 * @reserved2: Reserved for future use; see the note on reserved space.
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | twl4030-madc-hwmon.rst | 1 Kernel driver twl4030-madc
8 Prefix: 'twl4030-madc'
12 J Keerthy <j-keerthy@ti.com>
15 -----------
18 other things it contains a 10-bit A/D converter MADC. The converter has 16
19 channels which can be used in different modes.
22 See this table for the meaning of the different channels
40 13 Reserved
41 14 Reserved
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| /openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/ |
| H A D | pool.c | 1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019-2020, Mellanox Technologies inc. All rights reserved. */
12 struct device *dev = mlx5_core_dma_dev(priv->mdev); in mlx5e_xsk_map_pool()
25 if (!xsk->pools) { in mlx5e_xsk_get_pools()
26 xsk->pools = kcalloc(MLX5E_MAX_NUM_CHANNELS, in mlx5e_xsk_get_pools()
27 sizeof(*xsk->pools), GFP_KERNEL); in mlx5e_xsk_get_pools()
28 if (unlikely(!xsk->pools)) in mlx5e_xsk_get_pools()
29 return -ENOMEM; in mlx5e_xsk_get_pools()
32 xsk->refcnt++; in mlx5e_xsk_get_pools()
33 xsk->ever_used = true; in mlx5e_xsk_get_pools()
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