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/openbmc/docs/designs/
H A Ddevice-tree-gpio-naming.md12 subsystem. The replacement is a "descriptor-based" character device interface.
17 libgpiod provides a feature where you can access gpios by a name given to them
25 specific field used to name the GPIOs in the DTS is `gpio-line-names`. This
26 [patch][3] shows an example of naming the GPIOs for a system.
28 GPIOs are used for arbitrary things. It's pretty hard to have a coherent naming
29 scheme in the face of a universe of potential use-cases.
37 - Ensure common function GPIOs within OpenBMC use the same naming convention
44 for all common GPIOs.
46 This list below includes all common GPIOs within OpenBMC. Any OpenBMC system
47 which provides one of the below GPIOs must name it as listed in this document.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
[all …]
H A Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
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/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Dolpc,xo1.75-ec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/misc/olpc,xo1.75-ec.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: OLPC XO-1.75 Embedded Controller
12 on a OLPC XO-1.75 laptop computer.
16 response data) by strobing the ACK pin with the ready signal. See the
17 "ready-gpios" property of the SSP binding as documented in:
18 <Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>.
21 - Lubomir Rintel <lkundrak@v3.sk>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dmarvell,mmp2-ssp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
14 - $ref: spi-controller.yaml#
18 const: marvell,mmp2-ssp
29 ready-gpios:
32 ready to service a transfer. Only useful in slave mode.
36 - compatible
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-status {
36 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
[all …]
/openbmc/phosphor-state-manager/
H A Dmeson.options4 'host-sched-objpath',
11 'hypervisor-busname',
18 'hypervisor-objpath',
25 'host-state-persist-path',
27 value: '/var/lib/phosphor-state-manager/host{}-PersistDat
[all...]
/openbmc/linux/Documentation/devicetree/bindings/iio/magnetometer/
H A Dasahi-kasei,ak8975.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8975.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Albrieux <jonathan.albrieux@gmail.com>
15 - enum:
16 - asahi-kasei,ak8975
17 - asahi-kasei,ak8963
18 - asahi-kasei,ak09911
19 - asahi-kasei,ak09912
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
[all …]
H A Draw-nand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
32 Contains the chip-select IDs.
34 nand-ecc-placement:
[all …]
H A Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
21 read registers (tR). Required if property "gpios" is not used
[all …]
H A Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dtcan4x5x.txt7 - compatible:
11 - reg: 0
12 - #address-cells: 1
13 - #size-cells: 0
14 - spi-max-frequency: Maximum frequency of the SPI bus the chip can
16 - interrupt-parent: the phandle to the interrupt controller which provides
18 - interrupts: interrupt specification for data-ready.
24 - reset-gpios: Hardwired output GPIO. If not defined then software
26 - device-state-gpios: Input GPIO that indicates if the device is in
29 - device-wake-gpios: Wake up GPIO to wake up the TCAN device. Not
[all …]
/openbmc/openbmc/meta-hpe/meta-rl300-g11/recipes-hpe/power-sequencing/files/
H A Dgpios-manager.sh2 # File which is managing GPIOS when detected. First parameter is which GPIOs that switched
7 …busctl set-property xyz.openbmc_project.Chassis.Gpios /xyz/openbmc_project/chassis/gpios xyz.openb…
8 smproStatus=$(lsmod | grep smpro-mfd)
12 # We need to wait for the SoC to be ready to communicate - We just received the PGOOD signal
26 max_retry=$(( max_retry - 1))
34 i2ctransfer -y 3 w4@0x40 0x34 0xbf 0x00 0xe8
35 i2ctransfer -y 3 w2@0x40 0x34 0xa7 r1
38 i2ctransfer -y 3 w4@0x40 0x34 0xbf 0x00 0xe8
39 i2ctransfer -y 3 w2@0x40 0x34 0xa7 r1
42 i2ctransfer -y 3 w4@0x40 0x34 0xbf 0x00 0xe8
[all …]
/openbmc/linux/Documentation/devicetree/bindings/fpga/
H A Dlattice,sysconfig.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Georgiev <v.georgiev@metrotek.ru>
23 - lattice,sysconfig-ecp5
28 program-gpios:
34 init-gpios:
37 Indicates that the FPGA is ready to be configured.
40 done-gpios:
47 - compatible
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dmaxim,max98357a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tzung-Bi Shih <tzungbi@kernel.org>
13 Maxim Integrated MAX98357A/MAX98360A is a digital pulse-code modulation (PCM)
17 - $ref: dai-common.yaml#
22 - maxim,max98357a
23 - maxim,max98360a
25 '#sound-dai-cells':
28 sdmode-gpios:
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-moxa-uc-8410a.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
17 model = "Moxa UC-8410A";
18 compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a";
26 sys_mclk: clock-mclk {
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dmmp2-olpc-xo-1-75.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/linux-event-codes.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/clock/marvell,mmp2-audio.h>
16 model = "OLPC XO-1.75";
17 compatible = "olpc,xo-1.75", "mrvl,mmp2";
20 #address-cells = <1>;
21 #size-cells = <1>;
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dkb9202_nand.c1 // SPDX-License-Identifier: GPL-2.0+
18 * hardware specific access to control-lines
33 * Board-specific function to access device control signals
40 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; in kb9202_nand_hwcontrol()
51 this->IO_ADDR_W = (void *) IO_ADDR_W; in kb9202_nand_hwcontrol()
60 writeb(cmd, this->IO_ADDR_W); in kb9202_nand_hwcontrol()
65 * Board-specific function to access the device ready signal.
74 * Board-specific NAND init. Copied from include/linux/mtd/nand.h for reference.
76 * struct nand_chip - NAND Private Flash Chip Data
79 * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
[all …]
/openbmc/linux/arch/arm/mach-pxa/
H A Dspitz.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Hardware specific definitions for SL-Cx000 series of PDAs
17 /* Spitz/Akita GPIOs */
48 /* Spitz Only GPIOs */
50 #define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */
88 /* Spitz Scoop Device (No. 1) GPIOs */
118 /* Spitz Scoop Device (No. 2) GPIOs */
150 /* Akita IO Expander GPIOs */
/openbmc/linux/arch/arm/boot/dts/moxa/
H A Dmoxart-uc7112lx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX
7 /dts-v1/;
11 model = "MOXA UC-7112-LX";
12 compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart";
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <12000000>;
28 compatible = "numonyx,js28f128", "cfi-flash";
30 bank-width = <2>;
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-harma.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
11 compatible = "facebook,harma-bmc", "aspeed,ast2600";
32 stdout-path = &uart5;
40 iio-hwmon {
41 compatible = "iio-hwmon";
42 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
[all …]
H A Daspeed-bmc-ufispace-ncplite.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "ufispace,ncplite-bmc", "aspeed,ast2600";
18 stdout-path = &uart5;
27 iio-hwmon {
28 compatible = "iio-hwmon";
29 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
[all …]
/openbmc/openbmc/meta-phosphor/recipes-phosphor/state/
H A Dphosphor-state-manager_git.bb5 HOMEPAGE = "https://github.com/openbmc/phosphor-state-manager"
8 LICENSE = "Apache-2.0"
11 include phosphor-state-manager-systemd-links.inc
14 ${PN}-host \
15 ${PN}-chassis \
16 ${PN}-bm
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