| /openbmc/linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_crtc.c | 51 u64 pxlclk, aclk; in komeda_crtc_update_clock_ratio() local
58 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
61 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
151 err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000); in komeda_crtc_prepare()
153 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id); in komeda_crtc_prepare()
154 err = clk_prepare_enable(master->pxlclk); in komeda_crtc_prepare()
190 clk_disable_unprepare(master->pxlclk); in komeda_crtc_unprepare()
405 unsigned long pxlclk) in komeda_calc_min_aclk_rate() argument
408 * the aclk needs run on the double rate of pxlclk in komeda_calc_min_aclk_rate()
411 return pxlclk * 2; in komeda_calc_min_aclk_rate()
[all …]
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| H A D | komeda_kms.h | 113 /** @clock_ratio: ratio of (aclk << 32)/pxlclk */
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| H A D | komeda_pipeline.h | 392 /** @pxlclk: pixel clock */
393 struct clk *pxlclk; member
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| H A D | komeda_dev.c | 122 pipe->pxlclk = clk; in komeda_parse_pipe_dt()
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| H A D | komeda_pipeline.c | 58 clk_put(pipe->pxlclk); in komeda_pipeline_destroy()
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| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | snps,arcpgu.txt | 13 - "pxlclk" for the clock feeding the output PLL of the controller.
27 clock-names = "pxlclk";
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| H A D | arm,hdlcd.yaml | 30 const: pxlclk
67 clock-names = "pxlclk";
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| H A D | arm,malidp.yaml | 47 - const: pxlclk
109 clock-names = "pxlclk", "mclk", "aclk", "pclk";
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| /openbmc/u-boot/drivers/video/ |
| H A D | mali_dp.c | 94 struct clk pxlclk; member
187 if (clk_set_rate(&malidp->pxlclk, timings->pixelclock.typ) == 0) in malidp_setup_mode()
272 err = clk_get_by_name(dev, "pxlclk", &priv->pxlclk); in malidp_probe()
324 clk_enable(&priv->pxlclk); in malidp_probe()
375 clk_free(&priv->pxlclk); in malidp_probe()
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| /openbmc/linux/drivers/gpu/drm/arm/ |
| H A D | malidp_crtc.c | 38 rate = clk_round_rate(hwdev->pxlclk, req_rate); in malidp_crtc_mode_valid()
40 DRM_DEBUG_DRIVER("pxlclk doesn't support %ld Hz\n", in malidp_crtc_mode_valid()
63 clk_prepare_enable(hwdev->pxlclk); in malidp_crtc_atomic_enable()
66 clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); in malidp_crtc_atomic_enable()
88 clk_disable_unprepare(hwdev->pxlclk); in malidp_crtc_atomic_disable()
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| H A D | malidp_drv.c | 744 hwdev->pxlclk = devm_clk_get(dev, "pxlclk"); in malidp_bind()
745 if (IS_ERR(hwdev->pxlclk)) in malidp_bind()
746 return PTR_ERR(hwdev->pxlclk); in malidp_bind()
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| H A D | malidp_hw.c | 484 unsigned long pxlclk = vm->pixelclock; /* Hz */ in malidp500_se_calc_mclk() local
492 * mclk = max(a, 1.5) * pxlclk in malidp500_se_calc_mclk()
502 mclk = a * pxlclk / 10; in malidp500_se_calc_mclk()
825 unsigned long pxlclk = vm->pixelclock; in malidp550_se_calc_mclk() local
840 /* mclk can't be slower than pxlclk. */ in malidp550_se_calc_mclk()
843 mclk = (pxlclk * numerator) / denominator; in malidp550_se_calc_mclk()
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| H A D | malidp_hw.h | 240 struct clk *pxlclk; member
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| H A D | hdlcd_drv.c | 106 hdlcd->clk = devm_clk_get(drm->dev, "pxlclk"); in hdlcd_load()
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| /openbmc/linux/arch/arc/boot/dts/ |
| H A D | nsimosci.dts | 68 clock-names = "pxlclk";
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| H A D | nsimosci_hs.dts | 68 clock-names = "pxlclk";
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| H A D | nsimosci_hs_idu.dts | 74 clock-names = "pxlclk";
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| H A D | vdk_axs10x_mb.dtsi | 90 clock-names = "pxlclk";
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| H A D | axs10x_mb.dtsi | 309 clock-names = "pxlclk";
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| /openbmc/linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 733 clock-output-names = "pxlclk";
875 clock-names = "pxlclk";
890 clock-names = "pxlclk";
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| /openbmc/linux/arch/arm/boot/dts/arm/ |
| H A D | vexpress-v2p-ca5s.dts | 77 clock-names = "pxlclk";
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| H A D | vexpress-v2p-ca15-tc1.dts | 75 clock-names = "pxlclk";
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| /openbmc/linux/drivers/gpu/drm/tiny/ |
| H A D | arcpgu.c | 257 arcpgu->clk = devm_clk_get(drm->dev, "pxlclk"); in arcpgu_load()
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| /openbmc/u-boot/board/BuR/common/ |
| H A D | common.c | 137 "pxlclk : %d\n" in load_lcdtiming()
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| /openbmc/linux/drivers/gpu/drm/arm/display/komeda/d71/ |
| H A D | d71_component.c | 883 * PXLCLK (h_total - (1 + 2 * v_in / v_out)) * v_out in d71_downscaling_clk_check()
890 * PXLCLK (h_active - 3) in d71_downscaling_clk_check()
896 * PXLCLK (h_total -1 ) * v_out - 2 * v_in in d71_downscaling_clk_check()
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