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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s-colibri-iris.dts22 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
23 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
42 &pwm2 {
43 /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
H A Dimx7s-colibri-eval-v3.dts22 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
23 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
42 &pwm2 {
43 /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
H A Dimx7d-colibri-eval-v3.dts22 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
23 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
42 &pwm2 {
43 /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
H A Dimx7d-colibri-iris.dts22 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
23 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
42 &pwm2 {
43 /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
H A Dimx7-colibri-iris.dtsi12 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
13 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
64 &pwm2 {
65 /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
H A Dimx7-colibri-eval-v3.dtsi21 * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
22 * So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
66 &pwm2 {
67 /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
H A Dimx6q-var-dt6customboard.dts21 pwms = <&pwm2 0 50000>;
205 &pwm2 {
/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dsnps,dw-apb-timers-pwm2.yaml5 $id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#
28 const: snps,dw-apb-timers-pwm2
63 compatible = "snps,dw-apb-timers-pwm2";
H A Dmediatek,mt2712-pwm.yaml57 - const: pwm2
91 "pwm1", "pwm2",
H A Dti,twl-pwm.txt4 On TWL4030 series: PWM1 and PWM2
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dloongson,ls2k-pinctrl.yaml42 enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
47 enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
72 groups = "pwm2";
H A Dnuvoton,wpcm450-pinctrl.yaml76 fi12, fi13, fi14, fi15, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5,
86 pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, hg0, hg1,
/openbmc/linux/sound/soc/codecs/
H A Dtas5086.c592 SOC_DAPM_ENUM("PWM2 Output", tas5086_dapm_output_mux_enum[1]),
610 SND_SOC_DAPM_OUTPUT("PWM2"),
631 SND_SOC_DAPM_MUX("PWM2 Mux", SND_SOC_NOPM, 0, 0,
696 { "PWM2 Mux", "Channel 1 Mux", "Channel 1 Mux" },
703 { "PWM2 Mux", "Channel 2 Mux", "Channel 2 Mux" },
710 { "PWM2 Mux", "Channel 3 Mux", "Channel 3 Mux" },
717 { "PWM2 Mux", "Channel 4 Mux", "Channel 4 Mux" },
724 { "PWM2 Mux", "Channel 5 Mux", "Channel 5 Mux" },
731 { "PWM2 Mux", "Channel 6 Mux", "Channel 6 Mux" },
739 { "PWM2", NULL, "PWM2 Mux" },
/openbmc/u-boot/board/rockchip/evb_rk3399/
H A Devb-rk3399.c22 * The PWM2 and PWM3 are for pwm regulater. in board_init()
39 debug("%s PWM2 pinctrl init fail!\n", __func__); in board_init()
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-loongson2.c113 PMX_GROUP(pwm2, 0x0, 14),
128 SPECIFIC_GROUP(pwm2);
141 "pwm3", "pwm2", "pwm1", "pwm0",
155 FUNCTION(pwm2),
H A Dpinctrl-ingenic.c316 INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2, 0),
335 static const char *jz4740_pwm2_groups[] = { "pwm2", };
350 { "pwm2", jz4740_pwm2_groups, ARRAY_SIZE(jz4740_pwm2_groups), },
422 INGENIC_PIN_GROUP("pwm2", jz4725b_pwm_pwm2, 0),
441 static const char *jz4725b_pwm2_groups[] = { "pwm2", };
453 { "pwm2", jz4725b_pwm2_groups, ARRAY_SIZE(jz4725b_pwm2_groups), },
548 INGENIC_PIN_GROUP("pwm2", jz4750_pwm_pwm2, 0),
573 static const char *jz4750_pwm2_groups[] = { "pwm2", };
591 { "pwm2", jz4750_pwm2_groups, ARRAY_SIZE(jz4750_pwm2_groups), },
708 INGENIC_PIN_GROUP("pwm2", jz4755_pwm_pwm2, 0),
[all …]
/openbmc/openbmc/meta-hpe/meta-dl385-g11/recipes-phosphor/fans/phosphor-pid-control/
H A Dconfig.json22 "readPath": "/sys/class/hwmon/hwmon0/pwm2",
23 "writePath": "/sys/class/hwmon/hwmon0/pwm2",
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8mq-evk.dts40 label = "PWM2";
41 pwms = <&pwm2 0 50000>;
336 &pwm2 {
/openbmc/u-boot/arch/arm/mach-tegra/tegra114/
H A Dpinmux.c130 PIN(PU5, PWM2, UARTA, DISPLAYA, DISPLAYB),
162 PIN(GMI_AD10_PH2, PWM2, NAND, GMI, CLDVFS),
224 PIN(KB_COL3_PQ3, KBC, DISPLAYA, PWM2, UARTA),
262 PIN(SDMMC3_DAT1_PB6, SDMMC3, PWM2, UARTA, SPI3),
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c130 PIN(PU5, PWM2, UARTA, GMI, DISPLAYB),
162 PIN(PH2, PWM2, TMDS, GMI, CLDVFS),
223 PIN(KB_COL3_PQ3, KBC, DISPLAYA, PWM2, UARTA),
262 PIN(SDMMC3_DAT1_PB6, SDMMC3, PWM2, UARTA, SPI3),
/openbmc/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-wpcm450.dtsi407 pwm2_pins: mux-pwm2 {
408 groups = "pwm2";
409 function = "pwm2";
/openbmc/entity-manager/configurations/
H A Dfp5280g3_fanboard.json72 "PwmName": "pwm2",
101 "PwmName": "pwm2",
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-radxa-e25.dts28 pwms = <&pwm2 0 1000000 0>;
175 &pwm2 {
/openbmc/linux/drivers/pinctrl/berlin/
H A Dpinctrl-as370.c65 BERLIN_PINCTRL_FUNCTION(0x2, "pwm"), /* PWM2 */
173 BERLIN_PINCTRL_FUNCTION(0x3, "pwm")), /* PWM2 */
235 BERLIN_PINCTRL_GROUP("PWM2", 0x14, 0x3, 0x06,
237 BERLIN_PINCTRL_FUNCTION(0x1, "pwm")), /* PWM2 */
312 BERLIN_PINCTRL_FUNCTION(0x3, "pwm")), /* PWM2 */
/openbmc/openbmc/meta-ampere/meta-jefferson/recipes-phosphor/fans/phosphor-fan/
H A Dfans.json19 "sensors": ["PWM2"],

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