xref: /openbmc/linux/Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1*457ff9fbSYinbo Zhu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*457ff9fbSYinbo Zhu%YAML 1.2
3*457ff9fbSYinbo Zhu---
4*457ff9fbSYinbo Zhu$id: http://devicetree.org/schemas/pinctrl/loongson,ls2k-pinctrl.yaml#
5*457ff9fbSYinbo Zhu$schema: http://devicetree.org/meta-schemas/core.yaml#
6*457ff9fbSYinbo Zhu
7*457ff9fbSYinbo Zhutitle: Loongson-2 SoC Pinctrl Controller
8*457ff9fbSYinbo Zhu
9*457ff9fbSYinbo Zhumaintainers:
10*457ff9fbSYinbo Zhu  - zhanghongchen <zhanghongchen@loongson.cn>
11*457ff9fbSYinbo Zhu  - Yinbo Zhu <zhuyinbo@loongson.cn>
12*457ff9fbSYinbo Zhu
13*457ff9fbSYinbo ZhuallOf:
14*457ff9fbSYinbo Zhu  - $ref: pinctrl.yaml#
15*457ff9fbSYinbo Zhu
16*457ff9fbSYinbo Zhuproperties:
17*457ff9fbSYinbo Zhu  compatible:
18*457ff9fbSYinbo Zhu    const: loongson,ls2k-pinctrl
19*457ff9fbSYinbo Zhu
20*457ff9fbSYinbo Zhu  reg:
21*457ff9fbSYinbo Zhu    maxItems: 1
22*457ff9fbSYinbo Zhu
23*457ff9fbSYinbo ZhupatternProperties:
24*457ff9fbSYinbo Zhu  '-pins$':
25*457ff9fbSYinbo Zhu    type: object
26*457ff9fbSYinbo Zhu
27*457ff9fbSYinbo Zhu    additionalProperties: false
28*457ff9fbSYinbo Zhu
29*457ff9fbSYinbo Zhu    patternProperties:
30*457ff9fbSYinbo Zhu      'pinmux$':
31*457ff9fbSYinbo Zhu        type: object
32*457ff9fbSYinbo Zhu        description: node for pinctrl.
33*457ff9fbSYinbo Zhu        $ref: pinmux-node.yaml#
34*457ff9fbSYinbo Zhu
35*457ff9fbSYinbo Zhu        unevaluatedProperties: false
36*457ff9fbSYinbo Zhu
37*457ff9fbSYinbo Zhu        properties:
38*457ff9fbSYinbo Zhu          groups:
39*457ff9fbSYinbo Zhu            description:
40*457ff9fbSYinbo Zhu              One or more groups of pins to mux to a certain function
41*457ff9fbSYinbo Zhu            items:
42*457ff9fbSYinbo Zhu              enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
43*457ff9fbSYinbo Zhu                     nand, sata_led, i2s, hda]
44*457ff9fbSYinbo Zhu          function:
45*457ff9fbSYinbo Zhu            description:
46*457ff9fbSYinbo Zhu              The function that a group of pins is muxed to
47*457ff9fbSYinbo Zhu            enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
48*457ff9fbSYinbo Zhu                   nand, sata_led, i2s, hda]
49*457ff9fbSYinbo Zhu
50*457ff9fbSYinbo Zhu        required:
51*457ff9fbSYinbo Zhu          - groups
52*457ff9fbSYinbo Zhu          - function
53*457ff9fbSYinbo Zhu
54*457ff9fbSYinbo Zhurequired:
55*457ff9fbSYinbo Zhu  - compatible
56*457ff9fbSYinbo Zhu  - reg
57*457ff9fbSYinbo Zhu
58*457ff9fbSYinbo ZhuadditionalProperties: false
59*457ff9fbSYinbo Zhu
60*457ff9fbSYinbo Zhuexamples:
61*457ff9fbSYinbo Zhu  - |
62*457ff9fbSYinbo Zhu    pctrl: pinctrl@1fe00420 {
63*457ff9fbSYinbo Zhu        compatible = "loongson,ls2k-pinctrl";
64*457ff9fbSYinbo Zhu        reg = <0x1fe00420 0x18>;
65*457ff9fbSYinbo Zhu        sdio_pins_default: sdio-pins {
66*457ff9fbSYinbo Zhu            sdio-pinmux {
67*457ff9fbSYinbo Zhu                groups = "sdio";
68*457ff9fbSYinbo Zhu                function = "sdio";
69*457ff9fbSYinbo Zhu            };
70*457ff9fbSYinbo Zhu
71*457ff9fbSYinbo Zhu            sdio-det-pinmux {
72*457ff9fbSYinbo Zhu                groups = "pwm2";
73*457ff9fbSYinbo Zhu                function = "gpio";
74*457ff9fbSYinbo Zhu            };
75*457ff9fbSYinbo Zhu        };
76*457ff9fbSYinbo Zhu
77*457ff9fbSYinbo Zhu        pwm1_pins_default: pwm1-pins {
78*457ff9fbSYinbo Zhu            pinmux {
79*457ff9fbSYinbo Zhu                groups = "pwm1";
80*457ff9fbSYinbo Zhu                function = "pwm1";
81*457ff9fbSYinbo Zhu            };
82*457ff9fbSYinbo Zhu        };
83*457ff9fbSYinbo Zhu
84*457ff9fbSYinbo Zhu        pwm0_pins_default: pwm0-pins {
85*457ff9fbSYinbo Zhu            pinmux {
86*457ff9fbSYinbo Zhu                groups = "pwm0";
87*457ff9fbSYinbo Zhu                function = "pwm0";
88*457ff9fbSYinbo Zhu            };
89*457ff9fbSYinbo Zhu        };
90*457ff9fbSYinbo Zhu
91*457ff9fbSYinbo Zhu        i2c1_pins_default: i2c1-pins {
92*457ff9fbSYinbo Zhu            pinmux {
93*457ff9fbSYinbo Zhu                groups = "i2c1";
94*457ff9fbSYinbo Zhu                function = "i2c1";
95*457ff9fbSYinbo Zhu            };
96*457ff9fbSYinbo Zhu        };
97*457ff9fbSYinbo Zhu
98*457ff9fbSYinbo Zhu        i2c0_pins_default: i2c0-pins {
99*457ff9fbSYinbo Zhu            pinmux {
100*457ff9fbSYinbo Zhu                groups = "i2c0";
101*457ff9fbSYinbo Zhu                function = "i2c0";
102*457ff9fbSYinbo Zhu            };
103*457ff9fbSYinbo Zhu        };
104*457ff9fbSYinbo Zhu
105*457ff9fbSYinbo Zhu        nand_pins_default: nand-pins {
106*457ff9fbSYinbo Zhu            pinmux {
107*457ff9fbSYinbo Zhu                groups = "nand";
108*457ff9fbSYinbo Zhu                function = "nand";
109*457ff9fbSYinbo Zhu            };
110*457ff9fbSYinbo Zhu        };
111*457ff9fbSYinbo Zhu
112*457ff9fbSYinbo Zhu        hda_pins_default: hda-pins {
113*457ff9fbSYinbo Zhu            grp0-pinmux {
114*457ff9fbSYinbo Zhu                groups = "hda";
115*457ff9fbSYinbo Zhu                function = "hda";
116*457ff9fbSYinbo Zhu            };
117*457ff9fbSYinbo Zhu
118*457ff9fbSYinbo Zhu            grp1-pinmux {
119*457ff9fbSYinbo Zhu                groups = "i2s";
120*457ff9fbSYinbo Zhu                function = "gpio";
121*457ff9fbSYinbo Zhu            };
122*457ff9fbSYinbo Zhu        };
123*457ff9fbSYinbo Zhu    };
124