| /openbmc/linux/arch/arm/mach-s3c/ |
| H A D | setup-usb-phy-s3c64xx.c | 26 u32 phyclk; in s3c_usb_otgphy_init() local
31 phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK; in s3c_usb_otgphy_init()
37 phyclk |= S3C_PHYCLK_CLKSEL_12M; in s3c_usb_otgphy_init()
40 phyclk |= S3C_PHYCLK_CLKSEL_24M; in s3c_usb_otgphy_init()
51 writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK); in s3c_usb_otgphy_init()
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| /openbmc/u-boot/drivers/usb/gadget/ |
| H A D | dwc2_udc_otg_phy.c | 62 writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 | in otg_phy_init()
64 &phy->phyclk); /* PLL 24Mhz */ in otg_phy_init()
66 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) | in otg_phy_init()
67 CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ in otg_phy_init()
94 writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)), in otg_phy_off()
95 &phy->phyclk); in otg_phy_off()
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| H A D | dwc2_udc_otg_regs.h | 16 u32 phyclk; member
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| /openbmc/linux/drivers/phy/samsung/ |
| H A D | phy-exynos5250-sata.c | 50 struct clk *phyclk; member
196 sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl"); in exynos_sata_phy_probe()
197 if (IS_ERR(sata_phy->phyclk)) { in exynos_sata_phy_probe()
199 ret = PTR_ERR(sata_phy->phyclk); in exynos_sata_phy_probe()
203 ret = clk_prepare_enable(sata_phy->phyclk); in exynos_sata_phy_probe()
228 clk_disable_unprepare(sata_phy->phyclk); in exynos_sata_phy_probe()
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| /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-stm32.c | 65 *| | | st,ext-phyclk | | |
68 *| | | st,ext-phyclk | | |
71 *| | | st,ext-phyclk | | st,eth-clk-sel or|
72 *| | | | | st,ext-phyclk |
75 *| | | st,ext-phyclk | st,eth-ref-clk-sel | |
76 *| | | | or st,ext-phyclk | |
309 dwmac->ext_phyclk = of_property_read_bool(np, "st,ext-phyclk"); in stm32mp1_parse_data()
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| H A D | dwmac-sti.c | 55 *| | |clkgen/phyclk-in |
66 * phyclk| 1 | 0 | n/a |
228 dwmac->ext_phyclk = of_property_read_bool(np, "st,ext-phyclk"); in sti_dwmac_parse_data()
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | rockchip,inno-usb2phy.yaml | 40 const: phyclk
186 clock-names = "phyclk";
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| H A D | rockchip-usb-phy.yaml | 47 const: phyclk
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| /openbmc/linux/drivers/net/wireless/ath/ath10k/ |
| H A D | hw.c | 601 u32 phyclk; in ath10k_hw_qca988x_set_coverage_class() local
626 phyclk = MS(phyclk_reg, WAVE1_PHYCLK_USEC) + 1; in ath10k_hw_qca988x_set_coverage_class()
652 if (slottime_reg % phyclk) { in ath10k_hw_qca988x_set_coverage_class()
660 slottime = slottime / phyclk; in ath10k_hw_qca988x_set_coverage_class()
674 slottime += value * 3 * phyclk; in ath10k_hw_qca988x_set_coverage_class()
681 ack_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
687 cts_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | sti-dwmac.txt | 20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
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| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | samsung,exynos-dwc3.yaml | 86 - const: phyclk
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| /openbmc/u-boot/drivers/usb/host/ |
| H A D | dwc2.c | 77 uint32_t phyclk; in init_fslspclksel() local
80 phyclk = DWC2_HCFG_FSLSPCLKSEL_48_MHZ; /* Full speed PHY */ in init_fslspclksel()
83 phyclk = DWC2_HCFG_FSLSPCLKSEL_30_60_MHZ; in init_fslspclksel()
94 phyclk = DWC2_HCFG_FSLSPCLKSEL_48_MHZ; /* Full speed PHY */ in init_fslspclksel()
99 phyclk << DWC2_HCFG_FSLSPCLKSEL_OFFSET); in init_fslspclksel()
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| /openbmc/linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-hdmi.c | 245 struct clk *phyclk; member
638 ret = clk_prepare_enable(inno->phyclk); in inno_hdmi_phy_power_on()
644 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_on()
660 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_off()
1017 inno->phyclk = devm_clk_register(dev, &inno->hw); in inno_hdmi_phy_clk_register()
1018 if (IS_ERR(inno->phyclk)) { in inno_hdmi_phy_clk_register()
1019 ret = PTR_ERR(inno->phyclk); in inno_hdmi_phy_clk_register()
1024 ret = of_clk_add_provider(np, of_clk_src_simple_get, inno->phyclk); in inno_hdmi_phy_clk_register()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3188.dtsi | 142 clock-names = "phyclk";
150 clock-names = "phyclk";
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| H A D | stih407-pinctrl.dtsi | 221 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
263 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
284 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
290 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
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| H A D | stih407-clock.dtsi | 192 "clk-eth-ref-phyclk",
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| /openbmc/linux/drivers/clk/st/ |
| H A D | clk-flexgen.c | 360 { .name = "clk-eth-ref-phyclk", },
405 { .name = "clk-eth-ref-phyclk", },
460 { .name = "clk-eth-ref-phyclk", },
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stih407-pinctrl.dtsi | 218 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
260 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
281 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
287 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
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| /openbmc/linux/Documentation/devicetree/bindings/soc/rockchip/ |
| H A D | grf.yaml | 274 clock-names = "phyclk";
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| /openbmc/linux/Documentation/devicetree/bindings/clock/st/ |
| H A D | st,flexgen.txt | 128 "clk-eth-ref-phyclk",
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| /openbmc/linux/drivers/usb/dwc3/ |
| H A D | dwc3-exynos.c | 155 .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 277 /* Notify clk_mgr of a change in link rate, update phyclk frequency if necessary */
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 158 /* PHYCLK */ in dcn3_init_clocks()
464 /* Notify clk_mgr of a change in link rate, update phyclk frequency if necessary */
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| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3188.dtsi | 658 clock-names = "phyclk";
666 clock-names = "phyclk";
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| H A D | rk3066a.dtsi | 694 clock-names = "phyclk";
702 clock-names = "phyclk";
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